Message ID | 2a1997c2cd213ebfde70a2b325644de51e77d159.1550455620.git.shengjiu.wang@nxp.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [V2] ASoC: fsl_esai: fix register setting issue in RIGHT_J mode | expand |
Thanks, will send the patch again. Best regards Wang shengjiu > > On Mon, Feb 18, 2019 at 02:08:52AM +0000, S.j. Wang wrote: > > Fixes commit 43d24e76b698 ("ASoC: fsl_esai: Add ESAI CPU DAI driver") > > > > The ESAI_xCR_xWA is xCR's bit, not the xCCR's bit, driver set it to > > wrong register, correct it. > > > > Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> > > Reviewed-by: Fabio Estevam <festevam@gmail.com> > > Ackedy-by: Nicolin Chen <nicoleotsuka@gmail.com> > > --- > > Changes in v2 > > - add Fixes tag and cc stable kernel. > > <formletter> > > This is not the correct way to submit patches for inclusion in the stable > kernel tree. Please read: > > https://emea01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fww > w.kernel.org%2Fdoc%2Fhtml%2Flatest%2Fprocess%2Fstable-kernel- > rules.html&data=02%7C01%7Cshengjiu.wang%40nxp.com%7C16b1bd8 > d2f1c43b82dd108d695779d87%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C > 0%7C0%7C636860738312039576&sdata=l5OkD8ToHrcGa4dbXOuHdFTIF > pVdN9u5AzCZKj2C5Ew%3D&reserved=0 > for how to do this properly. > > </formletter>
diff --git a/sound/soc/fsl/fsl_esai.c b/sound/soc/fsl/fsl_esai.c index 57b484768a58..afe67c865330 100644 --- a/sound/soc/fsl/fsl_esai.c +++ b/sound/soc/fsl/fsl_esai.c @@ -398,7 +398,8 @@ static int fsl_esai_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) break; case SND_SOC_DAIFMT_RIGHT_J: /* Data on rising edge of bclk, frame high, right aligned */ - xccr |= ESAI_xCCR_xCKP | ESAI_xCCR_xHCKP | ESAI_xCR_xWA; + xccr |= ESAI_xCCR_xCKP | ESAI_xCCR_xHCKP; + xcr |= ESAI_xCR_xWA; break; case SND_SOC_DAIFMT_DSP_A: /* Data on rising edge of bclk, frame high, 1clk before data */ @@ -455,12 +456,12 @@ static int fsl_esai_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) return -EINVAL; } - mask = ESAI_xCR_xFSL | ESAI_xCR_xFSR; + mask = ESAI_xCR_xFSL | ESAI_xCR_xFSR | ESAI_xCR_xWA; regmap_update_bits(esai_priv->regmap, REG_ESAI_TCR, mask, xcr); regmap_update_bits(esai_priv->regmap, REG_ESAI_RCR, mask, xcr); mask = ESAI_xCCR_xCKP | ESAI_xCCR_xHCKP | ESAI_xCCR_xFSP | - ESAI_xCCR_xFSD | ESAI_xCCR_xCKD | ESAI_xCR_xWA; + ESAI_xCCR_xFSD | ESAI_xCCR_xCKD; regmap_update_bits(esai_priv->regmap, REG_ESAI_TCCR, mask, xccr); regmap_update_bits(esai_priv->regmap, REG_ESAI_RCCR, mask, xccr);