| Message ID | 20220330185454.10887-22-prabhakar.mahadev-lad.rj@bp.renesas.com (mailing list archive) |
|---|---|
| State | Accepted |
| Delegated to: | Pavel Machek |
| Headers | show |
| Series | Add SD/eMMC support for Renesas RZ/G2L SoC | expand |
Hi! > commit b4d86f37eacb724690d0d300576b82806bc743d5 upstream. > > All recent SDHI instances can be reset via the reset controller. If one > is found, use it instead of the open coded reset. This is to get a > future-proof sane reset state. > +++ b/drivers/mmc/host/renesas_sdhi_core.c > @@ -1086,6 +1097,10 @@ int renesas_sdhi_probe(struct platform_device *pdev, > if (ret) > goto efree; > > + priv->rstc = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL); > + if (IS_ERR(priv->rstc)) > + return PTR_ERR(priv->rstc); > + I believe this needs to goto to appropriate error path, not return directly. Best regards, Pavel
Hi Pavel, Thank you for the review. > -----Original Message----- > From: Pavel Machek <pavel@denx.de> > Sent: 31 March 2022 11:20 > To: Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com> > Cc: cip-dev@lists.cip-project.org; Nobuhiro Iwamatsu > <nobuhiro1.iwamatsu@toshiba.co.jp>; Pavel Machek <pavel@denx.de>; Biju Das > <biju.das.jz@bp.renesas.com> > Subject: Re: [PATCH 5.10.y-cip 21/39] mmc: renesas_sdhi: do hard reset if > possible > > Hi! > > > commit b4d86f37eacb724690d0d300576b82806bc743d5 upstream. > > > > All recent SDHI instances can be reset via the reset controller. If > > one is found, use it instead of the open coded reset. This is to get a > > future-proof sane reset state. > > > +++ b/drivers/mmc/host/renesas_sdhi_core.c > > @@ -1086,6 +1097,10 @@ int renesas_sdhi_probe(struct platform_device > *pdev, > > if (ret) > > goto efree; > > > > + priv->rstc = devm_reset_control_get_optional_exclusive(&pdev->dev, > NULL); > > + if (IS_ERR(priv->rstc)) > > + return PTR_ERR(priv->rstc); > > + > > I believe this needs to goto to appropriate error path, not return > directly. > Yes you are right this needs to land into appropriate error path. Cheers, Prabhakar > Best regards, > Pavel > -- > DENX Software Engineering GmbH, Managing Director: Wolfgang Denk > HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig index 30ff42fd173e..3538f9e9bce9 100644 --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig @@ -711,6 +711,7 @@ config MMC_SDHI tristate "Renesas SDHI SD/SDIO controller support" depends on SUPERH || ARCH_RENESAS || COMPILE_TEST select MMC_TMIO_CORE + select RESET_CONTROLLER if ARCH_RENESAS help This provides support for the SDHI SD/SDIO controller found in Renesas SuperH, ARM and ARM64 based SoCs diff --git a/drivers/mmc/host/renesas_sdhi.h b/drivers/mmc/host/renesas_sdhi.h index cb962c7883dc..53eded81a53e 100644 --- a/drivers/mmc/host/renesas_sdhi.h +++ b/drivers/mmc/host/renesas_sdhi.h @@ -70,6 +70,8 @@ struct renesas_sdhi { DECLARE_BITMAP(smpcmp, BITS_PER_LONG); unsigned int tap_num; unsigned int tap_set; + + struct reset_control *rstc; }; #define host_to_priv(host) \ diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c index eaf6071ab3cc..1783a0a6ee56 100644 --- a/drivers/mmc/host/renesas_sdhi_core.c +++ b/drivers/mmc/host/renesas_sdhi_core.c @@ -20,6 +20,7 @@ #include <linux/clk.h> #include <linux/delay.h> +#include <linux/iopoll.h> #include <linux/kernel.h> #include <linux/mfd/tmio.h> #include <linux/mmc/host.h> @@ -32,6 +33,7 @@ #include <linux/platform_device.h> #include <linux/pm_domain.h> #include <linux/regulator/consumer.h> +#include <linux/reset.h> #include <linux/sh_dma.h> #include <linux/slab.h> #include <linux/sys_soc.h> @@ -572,10 +574,19 @@ static void renesas_sdhi_scc_reset(struct tmio_mmc_host *host, struct renesas_sd static void renesas_sdhi_reset(struct tmio_mmc_host *host) { struct renesas_sdhi *priv = host_to_priv(host); + int ret; u16 val; - if (priv->scc_ctl) + if (priv->rstc) { + reset_control_reset(priv->rstc); + /* Unknown why but without polling reset status, it will hang */ + read_poll_timeout(reset_control_status, ret, ret == 0, 1, 100, + false, priv->rstc); + priv->needs_adjust_hs400 = false; + renesas_sdhi_set_clock(host, host->clk_cache); + } else if (priv->scc_ctl) { renesas_sdhi_scc_reset(host, priv); + } sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, TMIO_MASK_ALL_RCAR2); @@ -1086,6 +1097,10 @@ int renesas_sdhi_probe(struct platform_device *pdev, if (ret) goto efree; + priv->rstc = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL); + if (IS_ERR(priv->rstc)) + return PTR_ERR(priv->rstc); + ver = sd_ctrl_read16(host, CTL_VERSION); /* GEN2_SDR104 is first known SDHI to use 32bit block count */ if (ver < SDHI_VER_GEN2_SDR104 && mmc_data->max_blk_count > U16_MAX)