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[5.10.y-cip,01/13] arm64: dts: renesas: rzg2l-smarc: Use proper bool operator

Message ID 20230718140608.119449-2-biju.das.jz@bp.renesas.com (mailing list archive)
State Superseded
Headers show
Series Add RZ/{G2L,G2LC,V2L} MTU3 support. | expand

Commit Message

Biju Das July 18, 2023, 2:05 p.m. UTC
From: Wolfram Sang <wsa+renesas@sang-engineering.com>

commit 290cedeca6fa315c54e056b7bdd3fdd99e5303eb upstream.

When checking for defined macros, we want the boolean AND not the binary
one.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220603232940.21736-1-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
---
 arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi
index aa170492dd2b..6be25a8a28db 100644
--- a/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi
@@ -29,7 +29,7 @@ 
 #define SW_RSPI_CAN	1
 #endif
 
-#if (SW_SCIF_CAN & SW_RSPI_CAN)
+#if (SW_SCIF_CAN && SW_RSPI_CAN)
 #error "Can not set 1 to both SW_SCIF_CAN and SW_RSPI_CAN due to HW routing"
 #endif