| Message ID | 20171110162514.2114-1-stefan@agner.ch (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
Den 10.11.2017 17.25, skrev Stefan Agner: > With commit 0a70c998d0c5 ("drm/fsl-dcu: enable pixel clock when > enabling CRTC") the pixel clock is controlled by the CRTC code. > Disabling the pixel clock in suspend leads to a warning due to > the second clk_disable_unprepare call: > WARNING: CPU: 0 PID: 359 at drivers/clk/clk.c:594 clk_core_disable+0x8c/0x90 > > Remove clk_disable_unprepare call for pixel clock to avoid > unbalanced clock disable on suspend. > > Fixes: 0a70c998d0c5 ("drm/fsl-dcu: enable pixel clock when enabling CRTC") > Signed-off-by: Stefan Agner <stefan@agner.ch> > --- > drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 1 - > 1 file changed, 1 deletion(-) > > diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c > index 1a9ee657bbac..24f234902646 100644 > --- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c > +++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c > @@ -202,7 +202,6 @@ static int fsl_dcu_drm_pm_suspend(struct device *dev) > return ret; > } > > - clk_disable_unprepare(fsl_dev->pix_clk); > clk_disable_unprepare(fsl_dev->clk); > > return 0; Acked-by: Noralf Trønnes <noralf@tronnes.org>
diff --git a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c index 1a9ee657bbac..24f234902646 100644 --- a/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c +++ b/drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c @@ -202,7 +202,6 @@ static int fsl_dcu_drm_pm_suspend(struct device *dev) return ret; } - clk_disable_unprepare(fsl_dev->pix_clk); clk_disable_unprepare(fsl_dev->clk); return 0;
With commit 0a70c998d0c5 ("drm/fsl-dcu: enable pixel clock when enabling CRTC") the pixel clock is controlled by the CRTC code. Disabling the pixel clock in suspend leads to a warning due to the second clk_disable_unprepare call: WARNING: CPU: 0 PID: 359 at drivers/clk/clk.c:594 clk_core_disable+0x8c/0x90 Remove clk_disable_unprepare call for pixel clock to avoid unbalanced clock disable on suspend. Fixes: 0a70c998d0c5 ("drm/fsl-dcu: enable pixel clock when enabling CRTC") Signed-off-by: Stefan Agner <stefan@agner.ch> --- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 1 - 1 file changed, 1 deletion(-)