Message ID | 20201127120718.454037-108-matthew.auld@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | DG1 + LMEM enabling | expand |
Quoting Matthew Auld (2020-11-27 12:06:23) > From: CQ Tang <cq.tang@intel.com> > > The lmem region needs to remove the stolen part. > > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> > Cc: Matthew Auld <matthew.auld@intel.com> > Cc: Abdiel Janulgue <abdiel.janulgue@linux.intel.com> > Cc: Chris P Wilson <chris.p.wilson@intel.com> > Cc: Balestrieri, Francesco <francesco.balestrieri@intel.com> > Cc: Niranjana Vishwanathapura <niranjana.vishwanathapura@intel.com> > Cc: Venkata S Dhanalakota <venkata.s.dhanalakota@intel.com> > Cc: Neel Desai <neel.desai@intel.com> > Cc: Matthew Brost <matthew.brost@intel.com> > Cc: Sudeep Dutt <sudeep.dutt@intel.com> > Signed-off-by: CQ Tang <cq.tang@intel.com> > --- > drivers/gpu/drm/i915/i915_reg.h | 2 ++ > drivers/gpu/drm/i915/intel_region_lmem.c | 11 +++++++---- > 2 files changed, 9 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index 1af1966ac461..0e01ea0cb0a4 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -12066,6 +12066,8 @@ enum skl_power_gate { > #define GEN12_LMEM_CFG_ADDR _MMIO(0xcf58) > #define LMEM_ENABLE (1 << 31) > > +#define GEN12_GSMBASE _MMIO(0x108100) > + > /* gamt regs */ > #define GEN8_L3_LRA_1_GPGPU _MMIO(0x4dd4) > #define GEN8_L3_LRA_1_GPGPU_DEFAULT_VALUE_BDW 0x67F1427F /* max/min for LRA1/2 */ > diff --git a/drivers/gpu/drm/i915/intel_region_lmem.c b/drivers/gpu/drm/i915/intel_region_lmem.c > index e98582c76de1..7f2b31d469b0 100644 > --- a/drivers/gpu/drm/i915/intel_region_lmem.c > +++ b/drivers/gpu/drm/i915/intel_region_lmem.c > @@ -140,20 +140,23 @@ intel_setup_fake_lmem(struct drm_i915_private *i915) > static struct intel_memory_region * > setup_lmem(struct drm_i915_private *dev_priv) Am I wrong in thinking lmem should be under gt? > { > + struct intel_uncore *uncore = &dev_priv->uncore; > struct pci_dev *pdev = dev_priv->drm.pdev; > struct intel_memory_region *mem; > resource_size_t io_start; > - resource_size_t size; > + resource_size_t lmem_size; > > /* Enables Local Memory functionality in GAM */ > I915_WRITE(GEN12_LMEM_CFG_ADDR, I915_READ(GEN12_LMEM_CFG_ADDR) | LMEM_ENABLE); > > + /* Stolen starts from GSMBASE on DG1 */ > + lmem_size = intel_uncore_read64(uncore, GEN12_GSMBASE); > + > io_start = pci_resource_start(pdev, 2); > - size = pci_resource_len(pdev, 2); Sanitycheck the two. size = min(size, lmem_size); > > mem = intel_memory_region_create(dev_priv, > 0, > - size, > + lmem_size, Ok, stolen is at tail not start. > I915_GTT_PAGE_SIZE_4K, > io_start, > &intel_region_lmem_ops); > @@ -162,7 +165,7 @@ setup_lmem(struct drm_i915_private *dev_priv) > DRM_INFO("Intel graphics LMEM IO start: %llx\n", > (u64)mem->io_start); > DRM_INFO("Intel graphics LMEM size: %llx\n", > - (u64)size); > + (u64)lmem_size); Use the correct printf-formats, %pa. > } > > return mem; > -- > 2.26.2 > --------------------------------------------------------------------- Intel Corporation (UK) Limited Registered No. 1134945 (England) Registered Office: Pipers Way, Swindon SN3 1RJ VAT No: 860 2173 47 This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). Any review or distribution by others is strictly prohibited. If you are not the intended recipient, please contact the sender and delete all copies.
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 1af1966ac461..0e01ea0cb0a4 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -12066,6 +12066,8 @@ enum skl_power_gate { #define GEN12_LMEM_CFG_ADDR _MMIO(0xcf58) #define LMEM_ENABLE (1 << 31) +#define GEN12_GSMBASE _MMIO(0x108100) + /* gamt regs */ #define GEN8_L3_LRA_1_GPGPU _MMIO(0x4dd4) #define GEN8_L3_LRA_1_GPGPU_DEFAULT_VALUE_BDW 0x67F1427F /* max/min for LRA1/2 */ diff --git a/drivers/gpu/drm/i915/intel_region_lmem.c b/drivers/gpu/drm/i915/intel_region_lmem.c index e98582c76de1..7f2b31d469b0 100644 --- a/drivers/gpu/drm/i915/intel_region_lmem.c +++ b/drivers/gpu/drm/i915/intel_region_lmem.c @@ -140,20 +140,23 @@ intel_setup_fake_lmem(struct drm_i915_private *i915) static struct intel_memory_region * setup_lmem(struct drm_i915_private *dev_priv) { + struct intel_uncore *uncore = &dev_priv->uncore; struct pci_dev *pdev = dev_priv->drm.pdev; struct intel_memory_region *mem; resource_size_t io_start; - resource_size_t size; + resource_size_t lmem_size; /* Enables Local Memory functionality in GAM */ I915_WRITE(GEN12_LMEM_CFG_ADDR, I915_READ(GEN12_LMEM_CFG_ADDR) | LMEM_ENABLE); + /* Stolen starts from GSMBASE on DG1 */ + lmem_size = intel_uncore_read64(uncore, GEN12_GSMBASE); + io_start = pci_resource_start(pdev, 2); - size = pci_resource_len(pdev, 2); mem = intel_memory_region_create(dev_priv, 0, - size, + lmem_size, I915_GTT_PAGE_SIZE_4K, io_start, &intel_region_lmem_ops); @@ -162,7 +165,7 @@ setup_lmem(struct drm_i915_private *dev_priv) DRM_INFO("Intel graphics LMEM IO start: %llx\n", (u64)mem->io_start); DRM_INFO("Intel graphics LMEM size: %llx\n", - (u64)size); + (u64)lmem_size); } return mem;