| Message ID | 20210317154352.732095-12-maxime@cerno.tech (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/vc4: hdmi: Add Support for the YUV output | expand |
Am 17.03.21 um 16:43 schrieb Maxime Ripard: > On the BCM2711, the HDMI_VEC_INTERFACE_XBAR register configuration > depends on whether we're using an RGB or YUV output. Let's move that > configuration to the CSC setup. > > Signed-off-by: Maxime Ripard <maxime@cerno.tech> Acked-by: Thomas Zimmermann <tzimmermann@suse.de> > --- > drivers/gpu/drm/vc4/vc4_hdmi.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c > index 4ce0aea6ba17..9ba555d24187 100644 > --- a/drivers/gpu/drm/vc4/vc4_hdmi.c > +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c > @@ -530,6 +530,8 @@ static void vc5_hdmi_csc_setup(struct vc4_hdmi *vc4_hdmi, > { > u32 csc_ctl; > > + HDMI_WRITE(HDMI_VEC_INTERFACE_XBAR, 0x354021); > + > csc_ctl = 0x07; /* RGB_CONVERT_MODE = custom matrix, || USE_RGB_TO_YCBCR */ > > if (vc4_hdmi_is_full_range_rgb(vc4_hdmi, mode)) { > @@ -636,7 +638,6 @@ static void vc5_hdmi_set_timings(struct vc4_hdmi *vc4_hdmi, > bool gcp_en; > u32 reg; > > - HDMI_WRITE(HDMI_VEC_INTERFACE_XBAR, 0x354021); > HDMI_WRITE(HDMI_HORZA, > (vsync_pos ? VC5_HDMI_HORZA_VPOS : 0) | > (hsync_pos ? VC5_HDMI_HORZA_HPOS : 0) | >
diff --git a/drivers/gpu/drm/vc4/vc4_hdmi.c b/drivers/gpu/drm/vc4/vc4_hdmi.c index 4ce0aea6ba17..9ba555d24187 100644 --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c @@ -530,6 +530,8 @@ static void vc5_hdmi_csc_setup(struct vc4_hdmi *vc4_hdmi, { u32 csc_ctl; + HDMI_WRITE(HDMI_VEC_INTERFACE_XBAR, 0x354021); + csc_ctl = 0x07; /* RGB_CONVERT_MODE = custom matrix, || USE_RGB_TO_YCBCR */ if (vc4_hdmi_is_full_range_rgb(vc4_hdmi, mode)) { @@ -636,7 +638,6 @@ static void vc5_hdmi_set_timings(struct vc4_hdmi *vc4_hdmi, bool gcp_en; u32 reg; - HDMI_WRITE(HDMI_VEC_INTERFACE_XBAR, 0x354021); HDMI_WRITE(HDMI_HORZA, (vsync_pos ? VC5_HDMI_HORZA_VPOS : 0) | (hsync_pos ? VC5_HDMI_HORZA_HPOS : 0) |
On the BCM2711, the HDMI_VEC_INTERFACE_XBAR register configuration depends on whether we're using an RGB or YUV output. Let's move that configuration to the CSC setup. Signed-off-by: Maxime Ripard <maxime@cerno.tech> --- drivers/gpu/drm/vc4/vc4_hdmi.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)