| Message ID | 20230412112739.160376-17-angelogioacchino.delregno@collabora.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | MediaTek Helio X10 - Mailbox, Display, MMC/SD/SDIO | expand |
On 12/04/2023 13:27, AngeloGioacchino Del Regno wrote: > In preparation for adding multimedia blocks, add the CMDQ/GCE mailbox. > > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Applied, thanks > --- > arch/arm64/boot/dts/mediatek/mt6795.dtsi | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts/mediatek/mt6795.dtsi > index 090400d7fd61..99cc4918e6ba 100644 > --- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi > @@ -7,6 +7,7 @@ > #include <dt-bindings/interrupt-controller/irq.h> > #include <dt-bindings/interrupt-controller/arm-gic.h> > #include <dt-bindings/clock/mediatek,mt6795-clk.h> > +#include <dt-bindings/gce/mediatek,mt6795-gce.h> > #include <dt-bindings/pinctrl/mt6795-pinfunc.h> > #include <dt-bindings/power/mt6795-power.h> > #include <dt-bindings/reset/mediatek,mt6795-resets.h> > @@ -401,6 +402,15 @@ fhctl: clock-controller@10209f00 { > status = "disabled"; > }; > > + gce: mailbox@10212000 { > + compatible = "mediatek,mt6795-gce", "mediatek,mt8173-gce"; > + reg = <0 0x10212000 0 0x1000>; > + interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_LOW>; > + clocks = <&infracfg CLK_INFRA_GCE>; > + clock-names = "gce"; > + #mbox-cells = <2>; > + }; > + > gic: interrupt-controller@10221000 { > compatible = "arm,gic-400"; > #interrupt-cells = <3>;
diff --git a/arch/arm64/boot/dts/mediatek/mt6795.dtsi b/arch/arm64/boot/dts/mediatek/mt6795.dtsi index 090400d7fd61..99cc4918e6ba 100644 --- a/arch/arm64/boot/dts/mediatek/mt6795.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt6795.dtsi @@ -7,6 +7,7 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/clock/mediatek,mt6795-clk.h> +#include <dt-bindings/gce/mediatek,mt6795-gce.h> #include <dt-bindings/pinctrl/mt6795-pinfunc.h> #include <dt-bindings/power/mt6795-power.h> #include <dt-bindings/reset/mediatek,mt6795-resets.h> @@ -401,6 +402,15 @@ fhctl: clock-controller@10209f00 { status = "disabled"; }; + gce: mailbox@10212000 { + compatible = "mediatek,mt6795-gce", "mediatek,mt8173-gce"; + reg = <0 0x10212000 0 0x1000>; + interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_LOW>; + clocks = <&infracfg CLK_INFRA_GCE>; + clock-names = "gce"; + #mbox-cells = <2>; + }; + gic: interrupt-controller@10221000 { compatible = "arm,gic-400"; #interrupt-cells = <3>;
In preparation for adding multimedia blocks, add the CMDQ/GCE mailbox. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- arch/arm64/boot/dts/mediatek/mt6795.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+)