diff mbox series

[v4,22/78] drm/vc4: crtc: Move HVS init and close to a function

Message ID 840cb5324364e431b15d4105c85cebf8d12257f0.1594230107.git-series.maxime@cerno.tech (mailing list archive)
State New, archived
Headers show
Series drm/vc4: Support BCM2711 Display Pipeline | expand

Commit Message

Maxime Ripard July 8, 2020, 5:41 p.m. UTC 
In order to make further refactoring easier, let's move the HVS channel
setup / teardown to their own function.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/gpu/drm/vc4/vc4_hvs.c | 104 +++++++++++++++++++----------------
 1 file changed, 58 insertions(+), 46 deletions(-)

Comments

Dave Stevenson July 28, 2020, 10:31 a.m. UTC | #1 
Hi Maxime

On Wed, 8 Jul 2020 at 18:43, Maxime Ripard <maxime@cerno.tech> wrote:
>
> In order to make further refactoring easier, let's move the HVS channel
> setup / teardown to their own function.
>
> Signed-off-by: Maxime Ripard <maxime@cerno.tech>

Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com>

> ---
>  drivers/gpu/drm/vc4/vc4_hvs.c | 104 +++++++++++++++++++----------------
>  1 file changed, 58 insertions(+), 46 deletions(-)
>
> diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c
> index 50f9a9674a7e..78bb1c0b0b76 100644
> --- a/drivers/gpu/drm/vc4/vc4_hvs.c
> +++ b/drivers/gpu/drm/vc4/vc4_hvs.c
> @@ -196,6 +196,62 @@ static void vc4_hvs_update_gamma_lut(struct drm_crtc *crtc)
>         vc4_hvs_lut_load(crtc);
>  }
>
> +static int vc4_hvs_init_channel(struct vc4_dev *vc4, struct drm_crtc *crtc,
> +                               struct drm_display_mode *mode, bool oneshot)
> +{
> +       struct vc4_crtc_state *vc4_crtc_state = to_vc4_crtc_state(crtc->state);
> +       unsigned int chan = vc4_crtc_state->assigned_channel;
> +       u32 dispctrl;
> +
> +       /* Turn on the scaler, which will wait for vstart to start
> +        * compositing.
> +        * When feeding the transposer, we should operate in oneshot
> +        * mode.
> +        */
> +       dispctrl = SCALER_DISPCTRLX_ENABLE;
> +
> +       if (!vc4->hvs->hvs5)
> +               dispctrl |= VC4_SET_FIELD(mode->hdisplay,
> +                                         SCALER_DISPCTRLX_WIDTH) |
> +                           VC4_SET_FIELD(mode->vdisplay,
> +                                         SCALER_DISPCTRLX_HEIGHT) |
> +                           (oneshot ? SCALER_DISPCTRLX_ONESHOT : 0);
> +       else
> +               dispctrl |= VC4_SET_FIELD(mode->hdisplay,
> +                                         SCALER5_DISPCTRLX_WIDTH) |
> +                           VC4_SET_FIELD(mode->vdisplay,
> +                                         SCALER5_DISPCTRLX_HEIGHT) |
> +                           (oneshot ? SCALER5_DISPCTRLX_ONESHOT : 0);
> +
> +       HVS_WRITE(SCALER_DISPCTRLX(chan), dispctrl);
> +
> +       return 0;
> +}
> +
> +static void vc4_hvs_stop_channel(struct drm_device *dev, unsigned int chan)
> +{
> +       struct vc4_dev *vc4 = to_vc4_dev(dev);
> +
> +       if (HVS_READ(SCALER_DISPCTRLX(chan)) & SCALER_DISPCTRLX_ENABLE)
> +               return;
> +
> +       HVS_WRITE(SCALER_DISPCTRLX(chan),
> +                 HVS_READ(SCALER_DISPCTRLX(chan)) | SCALER_DISPCTRLX_RESET);
> +       HVS_WRITE(SCALER_DISPCTRLX(chan),
> +                 HVS_READ(SCALER_DISPCTRLX(chan)) & ~SCALER_DISPCTRLX_ENABLE);
> +
> +       /* Once we leave, the scaler should be disabled and its fifo empty. */
> +       WARN_ON_ONCE(HVS_READ(SCALER_DISPCTRLX(chan)) & SCALER_DISPCTRLX_RESET);
> +
> +       WARN_ON_ONCE(VC4_GET_FIELD(HVS_READ(SCALER_DISPSTATX(chan)),
> +                                  SCALER_DISPSTATX_MODE) !=
> +                    SCALER_DISPSTATX_MODE_DISABLED);
> +
> +       WARN_ON_ONCE((HVS_READ(SCALER_DISPSTATX(chan)) &
> +                     (SCALER_DISPSTATX_FULL | SCALER_DISPSTATX_EMPTY)) !=
> +                    SCALER_DISPSTATX_EMPTY);
> +}
> +
>  int vc4_hvs_atomic_check(struct drm_crtc *crtc,
>                          struct drm_crtc_state *state)
>  {
> @@ -268,63 +324,19 @@ void vc4_hvs_atomic_enable(struct drm_crtc *crtc,
>         struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state);
>         struct drm_display_mode *mode = &crtc->state->adjusted_mode;
>         bool oneshot = vc4_state->feed_txp;
> -       u32 dispctrl;
>
>         vc4_hvs_update_dlist(crtc);
> -
> -       /* Turn on the scaler, which will wait for vstart to start
> -        * compositing.
> -        * When feeding the transposer, we should operate in oneshot
> -        * mode.
> -        */
> -       dispctrl = SCALER_DISPCTRLX_ENABLE;
> -
> -       if (!vc4->hvs->hvs5)
> -               dispctrl |= VC4_SET_FIELD(mode->hdisplay,
> -                                         SCALER_DISPCTRLX_WIDTH) |
> -                           VC4_SET_FIELD(mode->vdisplay,
> -                                         SCALER_DISPCTRLX_HEIGHT) |
> -                           (oneshot ? SCALER_DISPCTRLX_ONESHOT : 0);
> -       else
> -               dispctrl |= VC4_SET_FIELD(mode->hdisplay,
> -                                         SCALER5_DISPCTRLX_WIDTH) |
> -                           VC4_SET_FIELD(mode->vdisplay,
> -                                         SCALER5_DISPCTRLX_HEIGHT) |
> -                           (oneshot ? SCALER5_DISPCTRLX_ONESHOT : 0);
> -
> -       HVS_WRITE(SCALER_DISPCTRLX(vc4_state->assigned_channel), dispctrl);
> +       vc4_hvs_init_channel(vc4, crtc, mode, oneshot);
>  }
>
>  void vc4_hvs_atomic_disable(struct drm_crtc *crtc,
>                             struct drm_crtc_state *old_state)
>  {
>         struct drm_device *dev = crtc->dev;
> -       struct vc4_dev *vc4 = to_vc4_dev(dev);
>         struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(old_state);
>         unsigned int chan = vc4_state->assigned_channel;
>
> -       if (HVS_READ(SCALER_DISPCTRLX(chan)) &
> -           SCALER_DISPCTRLX_ENABLE) {
> -               HVS_WRITE(SCALER_DISPCTRLX(chan),
> -                         SCALER_DISPCTRLX_RESET);
> -
> -               /* While the docs say that reset is self-clearing, it
> -                * seems it doesn't actually.
> -                */
> -               HVS_WRITE(SCALER_DISPCTRLX(chan), 0);
> -       }
> -
> -       /* Once we leave, the scaler should be disabled and its fifo empty. */
> -
> -       WARN_ON_ONCE(HVS_READ(SCALER_DISPCTRLX(chan)) & SCALER_DISPCTRLX_RESET);
> -
> -       WARN_ON_ONCE(VC4_GET_FIELD(HVS_READ(SCALER_DISPSTATX(chan)),
> -                                  SCALER_DISPSTATX_MODE) !=
> -                    SCALER_DISPSTATX_MODE_DISABLED);
> -
> -       WARN_ON_ONCE((HVS_READ(SCALER_DISPSTATX(chan)) &
> -                     (SCALER_DISPSTATX_FULL | SCALER_DISPSTATX_EMPTY)) !=
> -                    SCALER_DISPSTATX_EMPTY);
> +       vc4_hvs_stop_channel(dev, chan);
>  }
>
>  void vc4_hvs_atomic_flush(struct drm_crtc *crtc,
> --
> git-series 0.9.1
diff mbox series

Patch

diff --git a/drivers/gpu/drm/vc4/vc4_hvs.c b/drivers/gpu/drm/vc4/vc4_hvs.c
index 50f9a9674a7e..78bb1c0b0b76 100644
--- a/drivers/gpu/drm/vc4/vc4_hvs.c
+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
@@ -196,6 +196,62 @@  static void vc4_hvs_update_gamma_lut(struct drm_crtc *crtc)
 	vc4_hvs_lut_load(crtc);
 }
 
+static int vc4_hvs_init_channel(struct vc4_dev *vc4, struct drm_crtc *crtc,
+				struct drm_display_mode *mode, bool oneshot)
+{
+	struct vc4_crtc_state *vc4_crtc_state = to_vc4_crtc_state(crtc->state);
+	unsigned int chan = vc4_crtc_state->assigned_channel;
+	u32 dispctrl;
+
+	/* Turn on the scaler, which will wait for vstart to start
+	 * compositing.
+	 * When feeding the transposer, we should operate in oneshot
+	 * mode.
+	 */
+	dispctrl = SCALER_DISPCTRLX_ENABLE;
+
+	if (!vc4->hvs->hvs5)
+		dispctrl |= VC4_SET_FIELD(mode->hdisplay,
+					  SCALER_DISPCTRLX_WIDTH) |
+			    VC4_SET_FIELD(mode->vdisplay,
+					  SCALER_DISPCTRLX_HEIGHT) |
+			    (oneshot ? SCALER_DISPCTRLX_ONESHOT : 0);
+	else
+		dispctrl |= VC4_SET_FIELD(mode->hdisplay,
+					  SCALER5_DISPCTRLX_WIDTH) |
+			    VC4_SET_FIELD(mode->vdisplay,
+					  SCALER5_DISPCTRLX_HEIGHT) |
+			    (oneshot ? SCALER5_DISPCTRLX_ONESHOT : 0);
+
+	HVS_WRITE(SCALER_DISPCTRLX(chan), dispctrl);
+
+	return 0;
+}
+
+static void vc4_hvs_stop_channel(struct drm_device *dev, unsigned int chan)
+{
+	struct vc4_dev *vc4 = to_vc4_dev(dev);
+
+	if (HVS_READ(SCALER_DISPCTRLX(chan)) & SCALER_DISPCTRLX_ENABLE)
+		return;
+
+	HVS_WRITE(SCALER_DISPCTRLX(chan),
+		  HVS_READ(SCALER_DISPCTRLX(chan)) | SCALER_DISPCTRLX_RESET);
+	HVS_WRITE(SCALER_DISPCTRLX(chan),
+		  HVS_READ(SCALER_DISPCTRLX(chan)) & ~SCALER_DISPCTRLX_ENABLE);
+
+	/* Once we leave, the scaler should be disabled and its fifo empty. */
+	WARN_ON_ONCE(HVS_READ(SCALER_DISPCTRLX(chan)) & SCALER_DISPCTRLX_RESET);
+
+	WARN_ON_ONCE(VC4_GET_FIELD(HVS_READ(SCALER_DISPSTATX(chan)),
+				   SCALER_DISPSTATX_MODE) !=
+		     SCALER_DISPSTATX_MODE_DISABLED);
+
+	WARN_ON_ONCE((HVS_READ(SCALER_DISPSTATX(chan)) &
+		      (SCALER_DISPSTATX_FULL | SCALER_DISPSTATX_EMPTY)) !=
+		     SCALER_DISPSTATX_EMPTY);
+}
+
 int vc4_hvs_atomic_check(struct drm_crtc *crtc,
 			 struct drm_crtc_state *state)
 {
@@ -268,63 +324,19 @@  void vc4_hvs_atomic_enable(struct drm_crtc *crtc,
 	struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(crtc->state);
 	struct drm_display_mode *mode = &crtc->state->adjusted_mode;
 	bool oneshot = vc4_state->feed_txp;
-	u32 dispctrl;
 
 	vc4_hvs_update_dlist(crtc);
-
-	/* Turn on the scaler, which will wait for vstart to start
-	 * compositing.
-	 * When feeding the transposer, we should operate in oneshot
-	 * mode.
-	 */
-	dispctrl = SCALER_DISPCTRLX_ENABLE;
-
-	if (!vc4->hvs->hvs5)
-		dispctrl |= VC4_SET_FIELD(mode->hdisplay,
-					  SCALER_DISPCTRLX_WIDTH) |
-			    VC4_SET_FIELD(mode->vdisplay,
-					  SCALER_DISPCTRLX_HEIGHT) |
-			    (oneshot ? SCALER_DISPCTRLX_ONESHOT : 0);
-	else
-		dispctrl |= VC4_SET_FIELD(mode->hdisplay,
-					  SCALER5_DISPCTRLX_WIDTH) |
-			    VC4_SET_FIELD(mode->vdisplay,
-					  SCALER5_DISPCTRLX_HEIGHT) |
-			    (oneshot ? SCALER5_DISPCTRLX_ONESHOT : 0);
-
-	HVS_WRITE(SCALER_DISPCTRLX(vc4_state->assigned_channel), dispctrl);
+	vc4_hvs_init_channel(vc4, crtc, mode, oneshot);
 }
 
 void vc4_hvs_atomic_disable(struct drm_crtc *crtc,
 			    struct drm_crtc_state *old_state)
 {
 	struct drm_device *dev = crtc->dev;
-	struct vc4_dev *vc4 = to_vc4_dev(dev);
 	struct vc4_crtc_state *vc4_state = to_vc4_crtc_state(old_state);
 	unsigned int chan = vc4_state->assigned_channel;
 
-	if (HVS_READ(SCALER_DISPCTRLX(chan)) &
-	    SCALER_DISPCTRLX_ENABLE) {
-		HVS_WRITE(SCALER_DISPCTRLX(chan),
-			  SCALER_DISPCTRLX_RESET);
-
-		/* While the docs say that reset is self-clearing, it
-		 * seems it doesn't actually.
-		 */
-		HVS_WRITE(SCALER_DISPCTRLX(chan), 0);
-	}
-
-	/* Once we leave, the scaler should be disabled and its fifo empty. */
-
-	WARN_ON_ONCE(HVS_READ(SCALER_DISPCTRLX(chan)) & SCALER_DISPCTRLX_RESET);
-
-	WARN_ON_ONCE(VC4_GET_FIELD(HVS_READ(SCALER_DISPSTATX(chan)),
-				   SCALER_DISPSTATX_MODE) !=
-		     SCALER_DISPSTATX_MODE_DISABLED);
-
-	WARN_ON_ONCE((HVS_READ(SCALER_DISPSTATX(chan)) &
-		      (SCALER_DISPSTATX_FULL | SCALER_DISPSTATX_EMPTY)) !=
-		     SCALER_DISPSTATX_EMPTY);
+	vc4_hvs_stop_channel(dev, chan);
 }
 
 void vc4_hvs_atomic_flush(struct drm_crtc *crtc,