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[00/18] Introduce Alderlake-S

Message ID 20201021133213.328994-1-aditya.swarup@intel.com (mailing list archive)
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Series Introduce Alderlake-S | expand

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Aditya Swarup Oct. 21, 2020, 1:31 p.m. UTC
Alder Lake-S (ADL-S) is another gen12 platform and a TGL variant, with 
5 combo phy outputs with the following port/phy assignment:

        DDI-A   (port A) <-> PHY-A
        DDI-TC1 (port D) <-> PHY-B
        DDI-TC2 (port E) <-> PHY-C
        DDI-TC3 (port F) <-> PHY-D
        DDI-TC4 (port G) <-> PHY-E

It has 1 eDP, 2 HDMI and 2 DP++ display outputs.

Aditya Swarup (5):
  drm/i915/adl_s: Configure DPLL for ADL-S
  drm/i915/adl_s: Configure Port clock registers for ADL-S
  drm/i915/adl_s: Setup display outputs and HTI support for ADL-S
  drm/i915/adl_s: Add adl-s ddc pin mapping
  drm/i915/adl_s: Add vbt port and aux channel settings for adls

Anusha Srivatsa (5):
  drm/i915/adl_s: Add PCH support
  drm/i915/adl_s: Add Interrupt Support
  drm/i915/adl_s: Add PHYs for Alderlake S
  drm/i915/adl_s: Add display, gt, ctx and ADL-S whitelist WA
  drm/i915/adl_s: Load DMC

Caz Yokoyama (2):
  drm/i915/adl_s: Add ADL-S platform info and PCI ids
  x86/gpu: add ADL_S stolen memory support

José Roberto de Souza (1):
  drm/i915/display: Add HAS_D12_PLANE_MINIMIZATION

Matt Roper (3):
  drm/i915/adl_s: Update combo PHY master/slave relationships
  drm/i915/adl_s: Update PHY_MISC programming
  drm/i915/adl_s: Re-use TGL GuC/HuC firmware

Tejas Upadhyay (1):
  drm/i915/adl_s: Update memory bandwidth parameters

Yokoyama, Caz (1):
  drm/i915/adl_s: MCHBAR memory info registers are moved

 arch/x86/kernel/early-quirks.c                |  1 +
 drivers/gpu/drm/i915/display/intel_bios.c     | 55 +++++++++++++---
 drivers/gpu/drm/i915/display/intel_bw.c       |  8 +++
 .../gpu/drm/i915/display/intel_combo_phy.c    | 23 +++++--
 drivers/gpu/drm/i915/display/intel_csr.c      | 10 ++-
 drivers/gpu/drm/i915/display/intel_ddi.c      | 64 +++++++++++++------
 drivers/gpu/drm/i915/display/intel_display.c  | 34 ++++++++--
 .../drm/i915/display/intel_display_power.c    |  7 +-
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 38 +++++++++--
 drivers/gpu/drm/i915/display/intel_hdmi.c     | 20 +++++-
 drivers/gpu/drm/i915/display/intel_sprite.c   |  4 +-
 drivers/gpu/drm/i915/display/intel_vbt_defs.h |  4 ++
 drivers/gpu/drm/i915/gt/intel_workarounds.c   | 29 ++++++++-
 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c      |  4 +-
 drivers/gpu/drm/i915/i915_drv.h               | 12 ++++
 drivers/gpu/drm/i915/i915_irq.c               | 24 +++++--
 drivers/gpu/drm/i915/i915_pci.c               | 13 ++++
 drivers/gpu/drm/i915/i915_reg.h               | 59 +++++++++++++++--
 drivers/gpu/drm/i915/intel_device_info.c      |  9 ++-
 drivers/gpu/drm/i915/intel_device_info.h      |  1 +
 drivers/gpu/drm/i915/intel_dram.c             | 18 +++++-
 drivers/gpu/drm/i915/intel_pch.c              |  8 ++-
 drivers/gpu/drm/i915/intel_pch.h              |  3 +
 include/drm/i915_pciids.h                     | 13 ++++
 24 files changed, 392 insertions(+), 69 deletions(-)