| Message ID | 20210201183343.15292-1-ville.syrjala@linux.intel.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | drm/i915: Clean up the DDI clock routing mess | expand |
On Mon, Feb 01, 2021 at 08:33:28PM +0200, Ville Syrjälä wrote: >From: Ville Syrjälä <ville.syrjala@linux.intel.com> > >The DDI clock routing code has turned into proper spaghetti. >Attempt to clean it up by introducing some new vfuncs. A few minors I replied in the series. The move back and forth from one approach to the other IMO makes it harder to review, but after looking that the complete set: Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Lucas De Marchi > >Ville Syrjälä (15): > drm/i915: Extract icl_dpclka_cfgcr0_reg() > drm/i915: Extract icl_dpclka_cfgcr0_clk_sel*() > drm/i915: Introduce .{enable,disable}_clock() encoder vfuncs > drm/i915: Extract hsw_ddi_{enable,disable}_clock() > drm/i915: Extract skl_ddi_{enable,disable}_clock() > drm/i195: Extract cnl_ddi_{enable,disable}_clock() > drm/i915: Convert DG1 over to .{enable,disable}_clock() > drm/i915: Extract icl+ .{enable,disable}_clock() vfuncs > drm/i915: Use intel_de_rmw() for DDI clock routing > drm/i915: Sprinkle a few missing locks around shared DDI clock > registers > drm/i915: Sprinkle WARN(!pll) into icl/dg1 .clock_enable() > drm/i915: Extract _cnl_ddi_{enable,disable}_clock() > drm/i915: Split alds/rkl from icl_ddi_combo_{enable,disable}_clock() > drm/i915: Use .disable_clock() for pll sanitation > drm/i915: Relocate icl_sanitize_encoder_pll_mapping() > > drivers/gpu/drm/i915/display/icl_dsi.c | 1 + > drivers/gpu/drm/i915/display/intel_ddi.c | 536 ++++++++++-------- > .../drm/i915/display/intel_display_types.h | 6 + > 3 files changed, 295 insertions(+), 248 deletions(-) > >-- >2.26.2 > >_______________________________________________ >Intel-gfx mailing list >Intel-gfx@lists.freedesktop.org >https://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Mon, Feb 01, 2021 at 08:12:11PM -0000, Patchwork wrote: > == Series Details == > > Series: drm/i915: Clean up the DDI clock routing mess > URL : https://patchwork.freedesktop.org/series/86544/ > State : failure > > == Summary == > > CI Bug Log - changes from CI_DRM_9713 -> Patchwork_19556 > ==================================================== > > Summary > ------- > > **FAILURE** > > Serious unknown changes coming with Patchwork_19556 absolutely need to be > verified manually. > > If you think the reported changes have nothing to do with the changes > introduced in Patchwork_19556, please notify your bug team to allow them > to document this new failure mode, which will reduce false positives in CI. > > External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19556/index.html > > Possible new issues > ------------------- > > Here are the unknown changes that may have been introduced in Patchwork_19556: > > ### IGT changes ### > > #### Possible regressions #### > > * igt@kms_chamelium@common-hpd-after-suspend: > - fi-icl-u2: [PASS][1] -> [DMESG-WARN][2] > [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9713/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html > [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19556/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html <3> [153.691774] i915 0000:00:02.0: [drm] *ERROR* Failed to read DPCD register 0x92 Seems to be https://gitlab.freedesktop.org/drm/intel/-/issues/2868 except not yet tracked for icl. That register seems to be related to the HDMI 2.1 PCON stuff.
Re-reported. -----Original Message----- From: Ville Syrjälä <ville.syrjala@linux.intel.com> Sent: Monday, February 1, 2021 12:34 PM To: intel-gfx@lists.freedesktop.org Cc: Vudum, Lakshminarayana <lakshminarayana.vudum@intel.com> Subject: Re: ✗ Fi.CI.BAT: failure for drm/i915: Clean up the DDI clock routing mess On Mon, Feb 01, 2021 at 08:12:11PM -0000, Patchwork wrote: > == Series Details == > > Series: drm/i915: Clean up the DDI clock routing mess > URL : https://patchwork.freedesktop.org/series/86544/ > State : failure > > == Summary == > > CI Bug Log - changes from CI_DRM_9713 -> Patchwork_19556 > ==================================================== > > Summary > ------- > > **FAILURE** > > Serious unknown changes coming with Patchwork_19556 absolutely need to be > verified manually. > > If you think the reported changes have nothing to do with the changes > introduced in Patchwork_19556, please notify your bug team to allow them > to document this new failure mode, which will reduce false positives in CI. > > External URL: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19556/index.html > > Possible new issues > ------------------- > > Here are the unknown changes that may have been introduced in Patchwork_19556: > > ### IGT changes ### > > #### Possible regressions #### > > * igt@kms_chamelium@common-hpd-after-suspend: > - fi-icl-u2: [PASS][1] -> [DMESG-WARN][2] > [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9713/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html > [2]: > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19556/fi-icl-u2/igt > @kms_chamelium@common-hpd-after-suspend.html <3> [153.691774] i915 0000:00:02.0: [drm] *ERROR* Failed to read DPCD register 0x92 Seems to be https://gitlab.freedesktop.org/drm/intel/-/issues/2868 except not yet tracked for icl. That register seems to be related to the HDMI 2.1 PCON stuff. -- Ville Syrjälä Intel
On 2/2/2021 2:04 AM, Ville Syrjälä wrote: > On Mon, Feb 01, 2021 at 08:12:11PM -0000, Patchwork wrote: >> == Series Details == >> >> Series: drm/i915: Clean up the DDI clock routing mess >> URL : https://patchwork.freedesktop.org/series/86544/ >> State : failure >> >> == Summary == >> >> CI Bug Log - changes from CI_DRM_9713 -> Patchwork_19556 >> ==================================================== >> >> Summary >> ------- >> >> **FAILURE** >> >> Serious unknown changes coming with Patchwork_19556 absolutely need to be >> verified manually. >> >> If you think the reported changes have nothing to do with the changes >> introduced in Patchwork_19556, please notify your bug team to allow them >> to document this new failure mode, which will reduce false positives in CI. >> >> External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19556/index.html >> >> Possible new issues >> ------------------- >> >> Here are the unknown changes that may have been introduced in Patchwork_19556: >> >> ### IGT changes ### >> >> #### Possible regressions #### >> >> * igt@kms_chamelium@common-hpd-after-suspend: >> - fi-icl-u2: [PASS][1] -> [DMESG-WARN][2] >> [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9713/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html >> [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19556/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html > <3> [153.691774] i915 0000:00:02.0: [drm] *ERROR* Failed to read DPCD register 0x92 > > Seems to be > https://gitlab.freedesktop.org/drm/intel/-/issues/2868 > except not yet tracked for icl. > > That register seems to be related to the HDMI 2.1 PCON stuff. Yes you are right. I seemed to have missed a check for reading this only for DPCD rev>=1.4. I'll be sending patch to fix this to intel-gfx. I have already sent a patch to intel-trybot to verify this. https://patchwork.freedesktop.org/patch/418137/?series=86551&rev=1 Thanks & Regards, Ankit >
From: Ville Syrjälä <ville.syrjala@linux.intel.com> The DDI clock routing code has turned into proper spaghetti. Attempt to clean it up by introducing some new vfuncs. Ville Syrjälä (15): drm/i915: Extract icl_dpclka_cfgcr0_reg() drm/i915: Extract icl_dpclka_cfgcr0_clk_sel*() drm/i915: Introduce .{enable,disable}_clock() encoder vfuncs drm/i915: Extract hsw_ddi_{enable,disable}_clock() drm/i915: Extract skl_ddi_{enable,disable}_clock() drm/i195: Extract cnl_ddi_{enable,disable}_clock() drm/i915: Convert DG1 over to .{enable,disable}_clock() drm/i915: Extract icl+ .{enable,disable}_clock() vfuncs drm/i915: Use intel_de_rmw() for DDI clock routing drm/i915: Sprinkle a few missing locks around shared DDI clock registers drm/i915: Sprinkle WARN(!pll) into icl/dg1 .clock_enable() drm/i915: Extract _cnl_ddi_{enable,disable}_clock() drm/i915: Split alds/rkl from icl_ddi_combo_{enable,disable}_clock() drm/i915: Use .disable_clock() for pll sanitation drm/i915: Relocate icl_sanitize_encoder_pll_mapping() drivers/gpu/drm/i915/display/icl_dsi.c | 1 + drivers/gpu/drm/i915/display/intel_ddi.c | 536 ++++++++++-------- .../drm/i915/display/intel_display_types.h | 6 + 3 files changed, 295 insertions(+), 248 deletions(-)