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«
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Patch
Series
A/R/T
S/W/F
Date
Submitter
Delegate
State
[26/28] drm/i915: VLV doesn't have HDMI on port C
- - -
-
-
-
2013-03-01
Jesse Barnes
New
[25/28] drm/i915/dp: program VSwing and Preemphasis control settings on VLV
- - -
-
-
-
2013-03-01
Jesse Barnes
New
[23/28] drm/i915: use VLV DIP routines on VLV
- - -
-
-
-
2013-03-01
Jesse Barnes
New
[22/28] drm/i915: don't use plane pipe select on VLV
- - -
-
-
-
2013-03-01
Jesse Barnes
New
[20/28] drm/i915: don't enumerate VGA on VLV
- - -
-
-
-
2013-03-01
Jesse Barnes
New
[19/28] drm/i915: remove VLV MSI IRQ hack
- - -
-
-
-
2013-03-01
Jesse Barnes
New
[18/28] drm/i915: turbo & RC6 support for VLV
- - -
-
-
-
2013-03-01
Jesse Barnes
New
[17/28] drm/i915: add media well to VLV force wake routines
- - -
-
-
-
2013-03-01
Jesse Barnes
New
[16/28] drm/i915: add Punit read/write routines for VLV
- - -
-
-
-
2013-03-01
Jesse Barnes
New
[15/28] drm/i915: use gen6 stolen check on VLV
- - -
-
-
-
2013-03-01
Jesse Barnes
New
[14/28] drm/i915: disable watermarks on VLV, pondicherry takes care of this
- - -
-
-
-
2013-03-01
Jesse Barnes
New
[13/28] drm/i915: fix VLV limits and m/n/p calculations
- - -
-
-
-
2013-03-01
Jesse Barnes
New
[12/28] drm/i915: add more clock gating for VLV, allow force wake at init
- - -
-
-
-
2013-03-01
Jesse Barnes
New
[11/28] drm/i915: add power context allocation and setup on VLV
- - -
-
-
-
2013-03-01
Jesse Barnes
New
[10/28] drm/i915: VLV has force wake
- - -
-
-
-
2013-03-01
Jesse Barnes
New
[09/28] drm/i915: implement WaDisablePSDDualDispatchEnable on VLV
- - -
-
-
-
2013-03-01
Jesse Barnes
New
[08/28] drm/i915: implement WaGTEnableMiFlush on VLV
- - -
-
-
-
2013-03-01
Jesse Barnes
New
[07/28] drm/i915: implement WaForceL3Serialization on VLV and IVB
- - -
-
-
-
2013-03-01
Jesse Barnes
New
[06/28] drm/i915: add more VLV IDs
- - -
-
-
-
2013-03-01
Jesse Barnes
New
[05/28] drm/i915: panel power sequencing for VLV eDP
- - -
-
-
-
2013-03-01
Jesse Barnes
New
[04/28] drm/i915: update VLV PLL and DPIO code
- - -
-
-
-
2013-03-01
Jesse Barnes
New
[02/28] drm/i915: add sprite assertion function for VLV
- - -
-
-
-
2013-03-01
Jesse Barnes
New
[08/10] drm/i915: implement high-bpc + pipeconf-dither support for g4x/vlv
- - -
-
-
-
2013-02-22
Daniel Vetter
New
[29/36] drm/i915: implement high-bpc + pipeconf-dither support for g4x/vlv
- - -
-
-
-
2013-02-21
Daniel Vetter
New
[libdrm,2/2] intel_chipset: Fix up VLV confusion
- - -
-
-
-
2013-02-18
Ville Syrjälä
New
[06/12] quick_dump: vlv support
- - -
-
-
-
2013-02-07
Ben Widawsky
New
[06/10] quick_dump: vlv support
- - -
-
-
-
2013-02-03
Ben Widawsky
New
[22/22] drm/i915: turbo & RC6 support for VLV
- - -
-
-
-
2013-02-02
Jesse Barnes
New
[21/22] drm/i915: add media well to VLV force wake routines
- - -
-
-
-
2013-02-02
Jesse Barnes
New
[20/22] drm/i915: add Punit read/write routines for VLV
- - -
-
-
-
2013-02-02
Jesse Barnes
New
[19/22] drm/i915: use gen6 stolen check on VLV
- - -
-
-
-
2013-02-02
Jesse Barnes
New
[17/22] drm/i915: VLV hack: force DP to report connected
- - -
-
-
-
2013-02-02
Jesse Barnes
New
[16/22] drm/i915: VLV hack: Disable wm for VLV
- - -
-
-
-
2013-02-02
Jesse Barnes
New
[14/22] drm/i915: add HMDI workarounds on VLV
- - -
-
-
-
2013-02-02
Jesse Barnes
New
[13/22] drm/i915: update DPIO constants for VLV
- - -
-
-
-
2013-02-02
Jesse Barnes
New
[12/22] drm/i915: Fix VLV hdmi limits
- - -
-
-
-
2013-02-02
Jesse Barnes
New
[11/22] drm/i915: fixup port enumeration on VLV
- - -
-
-
-
2013-02-02
Jesse Barnes
New
[10/22] drm/i915: don't init LVDS on VLV
- - -
-
-
-
2013-02-02
Jesse Barnes
New
[09/22] drm/i915: more clock gating disables on VLV
- - -
-
-
-
2013-02-02
Jesse Barnes
New
[08/22] drm/i915: allow force wake on VLV
- - -
-
-
-
2013-02-02
Jesse Barnes
New
[06/22] drm/i915: add power context allocation and setup on VLV
- - -
-
-
-
2013-02-02
Jesse Barnes
New
[05/22] drm/i915: enable force wake, disable LLC on VLV
- - -
-
-
-
2013-02-02
Jesse Barnes
New
[04/22] drm/i915: implement WaGTEnableMiFlush on VLV
- - -
-
-
-
2013-02-02
Jesse Barnes
New
[03/22] drm/i915: add UCGCTL4 to display reg check on VLV
- - -
-
-
-
2013-02-02
Jesse Barnes
New
[02/22] drm/i915: remove VLV MSI IRQ hack
- - -
-
-
-
2013-02-02
Jesse Barnes
New
[01/22] drm/i915: add more VLV IDs
- - -
-
-
-
2013-02-02
Jesse Barnes
New
[v2,4/9] drm/i915: Pass VLV_DISPLAY_BASE + reg to intel_{hdmi, dp}_init on VLV
- - -
-
-
-
2013-01-25
Ville Syrjälä
New
[3/9] drm/i915: VLV doesn't have SDVO
- - -
-
-
-
2013-01-25
Ville Syrjälä
New
[v2,1/9] drm/i915: PLL registers need an offset on VLV
- - -
-
-
-
2013-01-25
Ville Syrjälä
New
[33/33] drm/i915: Kill VLV specific interrupts registers
- - -
-
-
-
2013-01-24
Ville Syrjälä
New
[31/33] drm/i915: Set display_mmio_offset for VLV
- - -
-
-
-
2013-01-24
Ville Syrjälä
New
[30/33] drm/i915: GPIO/GMBUS registers need an offset on VLV
- - -
-
-
-
2013-01-24
Ville Syrjälä
New
[29/33] drm/i915: VGA registers need an offset on VLV
- - -
-
-
-
2013-01-24
Ville Syrjälä
New
[28/33] drm/i915: DPIO registers are VLV only and need an offset
- - -
-
-
-
2013-01-24
Ville Syrjälä
New
[27/33] drm/i915: Spell out VLV_DISPLAY_BASE for interrupt registers
- - -
-
-
-
2013-01-24
Ville Syrjälä
New
[26/33] drm/i915: Make VLV_GUNIT_CLOCK_GATE register value more readable
- - -
-
-
-
2013-01-24
Ville Syrjälä
New
[25/33] drm/i915: PLL and clock gating registers need an offset on VLV
- - -
-
-
-
2013-01-24
Ville Syrjälä
New
[24/33] drm/i915: VLV doesn't seem to have VGA0/VGA1/VGA_PD registers
- - -
-
-
-
2013-01-24
Ville Syrjälä
New
[23/33] drm/i915: FB_BLC_SELF_VLV is VLV only and needs an offset
- - -
-
-
-
2013-01-24
Ville Syrjälä
New
[22/33] drm/i915: Pipe palette registers need an offset on VLV
- - -
-
-
-
2013-01-24
Ville Syrjälä
New
[21/33] drm/i915: Pipe timing registers need an offset on VLV
- - -
-
-
-
2013-01-24
Ville Syrjälä
New
[20/33] drm/i915: VLV_ADPA must be used in VLV code
- - -
-
-
-
2013-01-24
Ville Syrjälä
New
[19/33] drm/i915: PORT_HOTPLUG registers need an offset on VLV
- - -
-
-
-
2013-01-24
Ville Syrjälä
New
[18/33] drm/i915: Panel fitter registers need an offset on VLV
- - -
-
-
-
2013-01-24
Ville Syrjälä
New
[17/33] drm/i915: Pass VLV_DISPLAY_BASE + reg to intel_init_{sdvo, hdmi, dp} on VLV
- - -
-
-
-
2013-01-24
Ville Syrjälä
New
[16/33] drm/i915: DPFLIPSTAT and DPINVGTT registers are VLV only and need an offset
- - -
-
-
-
2013-01-24
Ville Syrjälä
New
[15/33] drm/i915: DSPARB register needs an offset on VLV
- - -
-
-
-
2013-01-24
Ville Syrjälä
New
[14/33] drm/i915: DSPFW registers need an offset on VLV
- - -
-
-
-
2013-01-24
Ville Syrjälä
New
[13/33] drm/i915: VLV_DDL is VLV only and needs an offset
- - -
-
-
-
2013-01-24
Ville Syrjälä
New
[12/33] drm/i915: Cursor registers need an offset on VLV
- - -
-
-
-
2013-01-24
Ville Syrjälä
New
[11/33] drm/i915: Pipe registers need an offset on VLV
- - -
-
-
-
2013-01-24
Ville Syrjälä
New
[10/33] drm/i915: Primary plane registers need an offset on VLV
- - -
-
-
-
2013-01-24
Ville Syrjälä
New
[09/33] drm/i915: VGACNTRL needs an offset on VLV
- - -
-
-
-
2013-01-24
Ville Syrjälä
New
[08/33] drm/i915: SWF screatch registers need an offset on VLV
- - -
-
-
-
2013-01-24
Ville Syrjälä
New
[07/33] drm/i915: PIPE M/N registers need an offset on VLV
- - -
-
-
-
2013-01-24
Ville Syrjälä
New
[06/33] drm/i915: VLV_VIDEO_DIP_CTL is for VLV only
- - -
-
-
-
2013-01-24
Ville Syrjälä
New
[05/33] drm/i915: Per-pipe PP registers are for VLV only
- - -
-
-
-
2013-01-24
Ville Syrjälä
New
[04/33] drm/i915: AUD_VID_DID needs an offset on VLV
- - -
-
-
-
2013-01-24
Ville Syrjälä
New
drm/i915: Fix SPRITE0_FLIP_DONE_INT_EN_VLV and SPRITE0_FLIPDONE_INT_STATUS_VLV
- - -
-
-
-
2013-01-16
Ville Syrjälä
New
[02/10] drm/i915: don't handle PIPE_LEGACY_BLC_EVENT_STATUS on vlv
- - -
-
-
-
2012-12-01
Daniel Vetter
New
[8/8] drm/i915: add clock gating regs to VLV offset check function
- - -
-
-
-
2012-10-25
Jesse Barnes
New
[5/8] drm/i915: implement WaDisablePSDDualDispatchEnable on IVB & VLV
- - -
-
-
-
2012-10-25
Jesse Barnes
New
[4/8] drm/i915: implement WaDisableVLVClockGating_VBIIssue on VLV
- - -
-
-
-
2012-10-25
Jesse Barnes
New
[3/8] drm/i915: implement WaForceL3Serialization on VLV and IVB
- - -
-
-
-
2012-10-25
Jesse Barnes
New
[2/8] drm/i915: implement WaDisableDopClockGatingisable on VLV and IVB
- - -
-
-
-
2012-10-25
Jesse Barnes
New
[1/8] drm/i915: implement WaDisableL3CacheAging on VLV
- - -
-
-
-
2012-10-25
Jesse Barnes
New
drm/i915: VLV does not have a sprite scaler
- - -
-
-
-
2012-10-25
Damien Lespiau
New
[3/3] drm/i915: Don't program DSPCLK_GATE_D twice on IVB and VLV
- - -
-
-
-
2012-10-19
Damien Lespiau
New
[8/8] drm/i915: add clock gating regs to VLV offset check function
- - -
-
-
-
2012-10-18
Jesse Barnes
New
[5/8] drm/i915: implement WaDisablePSDDualDispatchEnable on IVB & VLV
- - -
-
-
-
2012-10-18
Jesse Barnes
New
[4/8] drm/i915: implement WaDisableVLVClockGating_VBIIssue on VLV
- - -
-
-
-
2012-10-18
Jesse Barnes
New
[3/8] drm/i915: implement WaForceL3Serialization on VLV and IVB
- - -
-
-
-
2012-10-18
Jesse Barnes
New
[2/8] drm/i915: implement WaDisableDopClockGatingisable on VLV and IVB
- - -
-
-
-
2012-10-18
Jesse Barnes
New
[1/8] drm/i915: implement WaDisableL3CacheAging on VLV
- - -
-
-
-
2012-10-18
Jesse Barnes
New
[8/8] drm/i915: add clock gating regs to VLV offset check function
- - -
-
-
-
2012-10-18
Jesse Barnes
New
[5/8] drm/i915: implement WaDisablePSDDualDispatchEnable on IVB & VLV
- - -
-
-
-
2012-10-18
Jesse Barnes
New
[4/8] drm/i915: implement WaDisableVLVClockGating_VBIIssue on VLV
- - -
-
-
-
2012-10-18
Jesse Barnes
New
[3/8] drm/i915: implement WaForceL3Serialization on VLV and IVB
- - -
-
-
-
2012-10-18
Jesse Barnes
New
[2/8] drm/i915: implement WaDisableDopClockGatingisable on VLV and IVB
- - -
-
-
-
2012-10-18
Jesse Barnes
New
[1/8] drm/i915: implement WaDisableL3CacheAging on VLV
- - -
-
-
-
2012-10-18
Jesse Barnes
New
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