Show patches with: Submitter = None       |    State = Action Required       |   328 patches
« 1 2 3 4 »
Patch Series A/R/T S/W/F Date Submitter Delegate State
[v2,3/4] drm/i915/bxt: Add get_param to query Pooled EU availability - - - --- 2015-07-17 arun.siluvery@linux.intel.com New
[v2,2/4] drm/i915: Add provision to extend Golden context batch - 1 - --- 2015-07-17 arun.siluvery@linux.intel.com New
[v2,1/4] drm/i915: Do kunmap if renderstate parsing fails - 1 - --- 2015-07-17 arun.siluvery@linux.intel.com New
[v1,4/4] drm/i915/bxt: Add get_param to query Pooled EU availability - - - --- 2015-07-17 arun.siluvery@linux.intel.com New
[v1,3/4] drm/i915:bxt: Enable Pooled EU support - - - --- 2015-07-17 arun.siluvery@linux.intel.com New
[v1,2/4] drm/i915: Add provision to extend Golden context batch - - - --- 2015-07-17 arun.siluvery@linux.intel.com New
[v1,1/4] drm/i915: Do kunmap if renderstate parsing fails - 1 - --- 2015-07-17 arun.siluvery@linux.intel.com New
drm/i915: Change SRM, LRM instructions to use correct length - - - --- 2015-07-16 arun.siluvery@linux.intel.com New
[v3,4/4] drm/i915/gen9: Add WaSetDisablePixMaskCammingAndRhwoInCommonSliceChicken - 1 - --- 2015-07-14 arun.siluvery@linux.intel.com New
[v3,3/4] drm/i915/gen9: Add WaFlushCoherentL3CacheLinesAtContextSwitch workaround - - - --- 2015-07-14 arun.siluvery@linux.intel.com New
[v3,2/4] drm/i915/gen9: Add WaDisableCtxRestoreArbitration workaround - 1 - --- 2015-07-14 arun.siluvery@linux.intel.com New
[v3,1/4] drm/i915: Enable WA batch buffers for Gen9 - 1 - --- 2015-07-14 arun.siluvery@linux.intel.com New
[v2,3/4] drm/i915/gen9: Add WaFlushCoherentL3CacheLinesAtContextSwitch workaround - - - --- 2015-07-13 arun.siluvery@linux.intel.com New
[RFC,2/2] drm/i915/bxt: Enable pooled EUs for BXT - - - --- 2015-07-10 arun.siluvery@linux.intel.com New
[RFC,1/2] drm/i915: Offsets for golden context BB modification - - - --- 2015-07-10 arun.siluvery@linux.intel.com New
drm/i915: Update wa_ctx_emit() macro as per kernel coding guidelines - 1 - --- 2015-07-08 arun.siluvery@linux.intel.com New
drm/i915: Update wa_ctx_emit() macro as per kernel coding guidelines - - - --- 2015-07-07 arun.siluvery@linux.intel.com New
[v2,4/4] drm/i915/gen9: Add WaSetDisablePixMaskCammingAndRhwoInCommonSliceChicken - - - --- 2015-07-07 arun.siluvery@linux.intel.com New
[v2,2/4] drm/i915/gen9: Add WaDisableCtxRestoreArbitration workaround - 1 - --- 2015-07-07 arun.siluvery@linux.intel.com New
[v2,4/4] drm/i915/gen9: Add WaSetDisablePixMaskCammingAndRhwoInCommonSliceChicken - - - --- 2015-07-06 arun.siluvery@linux.intel.com New
[v2,3/4] drm/i915/gen9: Add WaFlushCoherentL3CacheLinesAtContextSwitch workaround - - - --- 2015-07-06 arun.siluvery@linux.intel.com New
[v2,2/4] drm/i915/gen9: Add WaDisableCtxRestoreArbitration workaround - - - --- 2015-07-06 arun.siluvery@linux.intel.com New
[v2,1/4] drm/i915: Enable WA batch buffers for Gen9 - 1 - --- 2015-07-06 arun.siluvery@linux.intel.com New
[4/4] drm/i915/gen9: Add WaSetDisablePixMaskCammingAndRhwoInCommonSliceChicken - - - --- 2015-07-03 arun.siluvery@linux.intel.com New
[3/4] drm/i915/gen9: Add WaFlushCoherentL3CacheLinesAtContextSwitch workaround - - - --- 2015-07-03 arun.siluvery@linux.intel.com New
[2/4] drm/i915/gen9: Add WaDisableCtxRestoreArbitration workaround - - - --- 2015-07-03 arun.siluvery@linux.intel.com New
[1/4] drm/i915: Enable WA batch buffers for Gen9 - - - --- 2015-07-03 arun.siluvery@linux.intel.com New
drm/i915: Update WaFlushCoherentL3CacheLinesAtContextSwitch - 1 1 --- 2015-07-03 arun.siluvery@linux.intel.com New
[2/2] drm/i915: Bail out early if WA batch is not available for given Gen - - - --- 2015-06-23 arun.siluvery@linux.intel.com New
[1/2] drm/i915: Fix warnings reported by 0-day - - - --- 2015-06-23 arun.siluvery@linux.intel.com New
[v6,5/5] drm/i915/gen8: Add WaClearSlmSpaceAtContextSwitch workaround 1 - - --- 2015-06-23 arun.siluvery@linux.intel.com New
[v6,1/6] drm/i915/gen8: Add infrastructure to initialize WA batch buffers - 1 - --- 2015-06-19 arun.siluvery@linux.intel.com New
[v6,6/6] drm/i915/gen8: Add WaRsRestoreWithPerCtxtBb workaround - - - --- 2015-06-19 arun.siluvery@linux.intel.com New
[v6,5/6] drm/i915/gen8: Add WaClearSlmSpaceAtContextSwitch workaround - - - --- 2015-06-19 arun.siluvery@linux.intel.com New
[v6,4/6] drm/i915/gen8: Add WaFlushCoherentL3CacheLinesAtContextSwitch workaround 1 - - --- 2015-06-19 arun.siluvery@linux.intel.com New
[v6,3/6] drm/i915/gen8: Add WaDisableCtxRestoreArbitration workaround 1 - - --- 2015-06-19 arun.siluvery@linux.intel.com New
[v6,2/6] drm/i915/gen8: Re-order init pipe_control in lrc mode - 1 - --- 2015-06-19 arun.siluvery@linux.intel.com New
[v6,1/6] drm/i915/gen8: Add infrastructure to initialize WA batch buffers - 1 - --- 2015-06-19 arun.siluvery@linux.intel.com New
[v5,6/6] drm/i915/gen8: Add WaRsRestoreWithPerCtxtBb workaround - - - --- 2015-06-18 arun.siluvery@linux.intel.com New
[v5,5/6] drm/i915/gen8: Add WaClearSlmSpaceAtContextSwitch workaround - - - --- 2015-06-18 arun.siluvery@linux.intel.com New
[v5,4/6] drm/i915/gen8: Add WaFlushCoherentL3CacheLinesAtContextSwitch workaround - - - --- 2015-06-18 arun.siluvery@linux.intel.com New
[v5,3/6] drm/i915/gen8: Add WaDisableCtxRestoreArbitration workaround - - - --- 2015-06-18 arun.siluvery@linux.intel.com New
[v5,2/6] drm/i915/gen8: Re-order init pipe_control in lrc mode - - - --- 2015-06-18 arun.siluvery@linux.intel.com New
[v5,1/6] drm/i915/gen8: Add infrastructure to initialize WA batch buffers - - - --- 2015-06-18 arun.siluvery@linux.intel.com New
[v5,6/6] drm/i915/gen8: Add WaRsRestoreWithPerCtxtBb workaround - - - --- 2015-06-18 arun.siluvery@linux.intel.com New
[v5,5/6] drm/i915/gen8: Add WaClearSlmSpaceAtContextSwitch workaround - - - --- 2015-06-18 arun.siluvery@linux.intel.com New
[v5,4/6] drm/i915/gen8: Add WaFlushCoherentL3CacheLinesAtContextSwitch workaround - - - --- 2015-06-18 arun.siluvery@linux.intel.com New
[v5,3/6] drm/i915/gen8: Add WaDisableCtxRestoreArbitration workaround - - - --- 2015-06-18 arun.siluvery@linux.intel.com New
[v5,2/6] drm/i915/gen8: Re-order init pipe_control in lrc mode - - - --- 2015-06-18 arun.siluvery@linux.intel.com New
[v5,1/6] drm/i915/gen8: Add infrastructure to initialize WA batch buffers - - - --- 2015-06-18 arun.siluvery@linux.intel.com New
[v4,6/6] drm/i915/gen8: Add WaRsRestoreWithPerCtxtBb workaround - - - --- 2015-06-16 arun.siluvery@linux.intel.com New
[v4,5/6] drm/i915/gen8: Add WaClearSlmSpaceAtContextSwitch workaround - - - --- 2015-06-16 arun.siluvery@linux.intel.com New
[v4,4/6] drm/i915/gen8: Add WaFlushCoherentL3CacheLinesAtContextSwitch workaround - - - --- 2015-06-16 arun.siluvery@linux.intel.com New
[v4,3/6] drm/i915/gen8: Add WaDisableCtxRestoreArbitration workaround - - - --- 2015-06-16 arun.siluvery@linux.intel.com New
[v4,2/6] drm/i915/gen8: Re-order init pipe_control in lrc mode - - - --- 2015-06-16 arun.siluvery@linux.intel.com New
[v4,1/6] drm/i915/gen8: Add infrastructure to initialize WA batch buffers - - - --- 2015-06-16 arun.siluvery@linux.intel.com New
[v3,6/6] drm/i915/gen8: Add WaRsRestoreWithPerCtxtBb workaround - - - --- 2015-06-05 arun.siluvery@linux.intel.com New
[v3,5/6] drm/i915/gen8: Add WaClearSlmSpaceAtContextSwitch workaround - - - --- 2015-06-05 arun.siluvery@linux.intel.com New
[v3,4/6] drm/i915/gen8: Add WaFlushCoherentL3CacheLinesAtContextSwitch workaround - - - --- 2015-06-05 arun.siluvery@linux.intel.com New
[v3,3/6] drm/i915/gen8: Add WaDisableCtxRestoreArbitration workaround - - - --- 2015-06-05 arun.siluvery@linux.intel.com New
[v3,2/6] drm/i915/gen8: Re-order init pipe_control in lrc mode - - - --- 2015-06-05 arun.siluvery@linux.intel.com New
[v3,1/6] drm/i915/gen8: Add infrastructure to initialize WA batch buffers - - - --- 2015-06-05 arun.siluvery@linux.intel.com New
[v3,6/6] drm/i915/gen8: Add WaRsRestoreWithPerCtxtBb workaround - - 1 --- 2015-06-05 arun.siluvery@linux.intel.com New
[v3,5/6] drm/i915/gen8: Add WaClearSlmSpaceAtContextSwitch workaround - - - --- 2015-06-05 arun.siluvery@linux.intel.com New
[v3,4/6] drm/i915/gen8: Add WaFlushCoherentL3CacheLinesAtContextSwitch workaround - - - --- 2015-06-05 arun.siluvery@linux.intel.com New
[v3,3/6] drm/i915/gen8: Add WaDisableCtxRestoreArbitration workaround - - - --- 2015-06-05 arun.siluvery@linux.intel.com New
[v3,2/6] drm/i915/gen8: Re-order init pipe_control in lrc mode - - - --- 2015-06-05 arun.siluvery@linux.intel.com New
[v3,1/6] drm/i915/gen8: Add infrastructure to initialize WA batch buffers - - - --- 2015-06-05 arun.siluvery@linux.intel.com New
drm/i915: Initialize HWS page address after GPU reset - 1 1 --- 2015-06-02 arun.siluvery@linux.intel.com New
[v2,7/7] drm/i915/gen8: Add WaRsRestoreWithPerCtxtBb workaround - - 1 --- 2015-05-29 arun.siluvery@linux.intel.com New
[v2,6/7] drm/i915/gen8: Add WaClearSlmSpaceAtContextSwitch workaround - - - --- 2015-05-29 arun.siluvery@linux.intel.com New
[v2,5/7] drm/i915/gen8: Add WaFlushCoherentL3CacheLinesAtContextSwitch workaround - - - --- 2015-05-29 arun.siluvery@linux.intel.com New
[v2,4/7] drm/i915/gen8: Add WaDisableCtxRestoreArbitration workaround - - - --- 2015-05-29 arun.siluvery@linux.intel.com New
[v2,3/7] drm/i915/gen8: Enable WA batch buffers during ctx save/restore - - - --- 2015-05-29 arun.siluvery@linux.intel.com New
[v2,2/7] drm/i915/gen8: Re-order init pipe_control in lrc mode - - - --- 2015-05-29 arun.siluvery@linux.intel.com New
[v2,1/7] drm/i915/gen8: Add infrastructure to initialize WA batch buffers - - - --- 2015-05-29 arun.siluvery@linux.intel.com New
drm/i915: Do not set L3-LLC Coherency bit in ctx descriptor - - - --- 2015-04-07 arun.siluvery@linux.intel.com New
[v2,2/2] drm/i915/gen8: Apply Per-context workarounds using W/A batch buffers - - - --- 2015-03-02 arun.siluvery@linux.intel.com New
[v2,1/2] drm/i915/gen8: The WA BB framework is enabled. - - - --- 2015-03-02 arun.siluvery@linux.intel.com New
[v2,1/2] drm/i915/gen8: The WA BB framework is enabled. - - - --- 2015-03-02 arun.siluvery@linux.intel.com New
[2/2] drm/i915/gen8: Apply Per-context workarounds using W/A batch buffers - - - --- 2015-02-25 arun.siluvery@linux.intel.com New
[1/2] drm/i915/gen8: The WA BB framework is enabled. - - - --- 2015-02-25 arun.siluvery@linux.intel.com New
drm/i915/chv: Add additional workarounds for CHV - - - --- 2014-12-03 arun.siluvery@linux.intel.com New
drm/i915: Free resources correctly if we cannot map status page during ctx create - - - --- 2014-11-17 arun.siluvery@linux.intel.com New
[3/3] drm/i915/chv: Add new workarounds for chv - - - --- 2014-10-28 arun.siluvery@linux.intel.com New
[2/3] drm/i915/chv: Combine GEN8_ROW_CHICKEN w/a - - - --- 2014-10-28 arun.siluvery@linux.intel.com New
[1/3] drm/i915/chv: Remove pre-production workarounds - - - --- 2014-10-28 arun.siluvery@linux.intel.com New
drm/i915: Initialize workarounds in logical ring mode too - - - --- 2014-10-28 arun.siluvery@linux.intel.com New
drm/i915: Initialize workarounds in logical ring mode too - - - --- 2014-10-28 arun.siluvery@linux.intel.com New
drm/i915/chv: Add new WA and remove pre-production ones - - - --- 2014-10-28 arun.siluvery@linux.intel.com New
[2/2] drm/i915/gen8: Apply pre-production WA based on revision - - - --- 2014-10-28 arun.siluvery@linux.intel.com New
[1/2] drm/i915/chv: Add few more CHV workarounds - - - --- 2014-10-28 arun.siluvery@linux.intel.com New
drm/i915: Add means to apply WA conditionally - - - --- 2014-10-23 arun.siluvery@linux.intel.com New
drm/i915: Emit even number of dwords when emitting LRIs - - - --- 2014-10-22 arun.siluvery@linux.intel.com New
drm/i915: Emit even number of dwords when emitting LRIs - - - --- 2014-10-22 arun.siluvery@linux.intel.com New
[v2] igt/gem_workarounds: rework igt to test workaround registers - - - --- 2014-09-02 arun.siluvery@linux.intel.com New
[v2] drm/i915: Rework workaround data exporting to debugfs - - - --- 2014-09-02 arun.siluvery@linux.intel.com New
[v2] drm/i915: Rework workaround init functions for BDW and CHV - - - --- 2014-09-02 arun.siluvery@linux.intel.com New
[2/2] igt/gem_workarounds: rework igt to test workaround registers - - - --- 2014-09-01 arun.siluvery@linux.intel.com New
[1/2] gem_workarounds: intel_wa_registers is now prefixed with i915 - - - --- 2014-09-01 arun.siluvery@linux.intel.com New
« 1 2 3 4 »