Show patches with: Submitter = Souza, Jose       |    State = Action Required       |   1473 patches
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Patch Series A/R/T S/W/F Date Submitter Delegate State
[4/5] drm/i915/psr: Check if sink PSR capability changed [1/5] drm/i915/psr: Add bits per pixel limitation - - - --- 2019-11-06 Souza, Jose New
[3/5] drm/i915/psr: Enable ALPM lock timeout error interruption [1/5] drm/i915/psr: Add bits per pixel limitation - - - --- 2019-11-06 Souza, Jose New
[2/5] drm/i915/psr: Refactor psr short pulse handler [1/5] drm/i915/psr: Add bits per pixel limitation - - - --- 2019-11-06 Souza, Jose New
[1/5] drm/i915/psr: Add bits per pixel limitation [1/5] drm/i915/psr: Add bits per pixel limitation - - - --- 2019-11-06 Souza, Jose New
[3/3] drm/i915/dc3co: Avoid full modeset when EXITLINE needs to be changed [1/3] drm/i915/psr: Share the computation of idle frames - - - --- 2019-11-01 Souza, Jose New
[2/3] drm/i915/dc3co: Check for DC3C0 exit state instead of sleep [1/3] drm/i915/psr: Share the computation of idle frames - - - --- 2019-11-01 Souza, Jose New
[1/3] drm/i915/psr: Share the computation of idle frames [1/3] drm/i915/psr: Share the computation of idle frames 1 1 - --- 2019-11-01 Souza, Jose New
drm/i915/dp: Do not switch aux to TBT mode for non-TC ports drm/i915/dp: Do not switch aux to TBT mode for non-TC ports - 1 - --- 2019-10-29 Souza, Jose New
[5/5] drm/i915/display/cnl+: Handle fused off DSC [1/5] drm/i915: Add two spaces before the SKL_DFSM registers - 2 - --- 2019-10-26 Souza, Jose New
[4/5] drm/i915/display/icl+: Check if DMC is fused off [1/5] drm/i915: Add two spaces before the SKL_DFSM registers - 1 - --- 2019-10-26 Souza, Jose New
[3/5] drm/i915/display: Check if FBC is fused off [1/5] drm/i915: Add two spaces before the SKL_DFSM registers - 1 - --- 2019-10-26 Souza, Jose New
[2/5] drm/i915/display: Handle fused off HDCP [1/5] drm/i915: Add two spaces before the SKL_DFSM registers - 2 - --- 2019-10-26 Souza, Jose New
[1/5] drm/i915: Add two spaces before the SKL_DFSM registers [1/5] drm/i915: Add two spaces before the SKL_DFSM registers - 2 - --- 2019-10-26 Souza, Jose New
drm/i915/display/psr: Print in debugfs if PSR is not enabled because of sink drm/i915/display/psr: Print in debugfs if PSR is not enabled because of sink - 1 - --- 2019-10-23 Souza, Jose New
drm/i915/tc: Clear DKL_TX_PMD_LANE_SUS before program voltage swing drm/i915/tc: Clear DKL_TX_PMD_LANE_SUS before program voltage swing - - - --- 2019-10-21 Souza, Jose New
[5/5] drm/i915/display/cnl+: Handle fused off DSC [1/5] drm/i915/display: Handle fused off display correctly - 2 - --- 2019-10-19 Souza, Jose New
[4/5] drm/i915/display/icl+: Check if DMC is fused off [1/5] drm/i915/display: Handle fused off display correctly - 1 - --- 2019-10-19 Souza, Jose New
[3/5] drm/i915/display: Check if FBC is fused off [1/5] drm/i915/display: Handle fused off display correctly - 1 - --- 2019-10-19 Souza, Jose New
[2/5] drm/i915/display: Handle fused off HDCP [1/5] drm/i915/display: Handle fused off display correctly - 2 - --- 2019-10-19 Souza, Jose New
[1/5] drm/i915/display: Handle fused off display correctly [1/5] drm/i915/display: Handle fused off display correctly - - - --- 2019-10-19 Souza, Jose New
[4/4] drm/i915/display: Check if FBC and DMC are fused off [1/4] drm/i915/display: Handle fused off display correctly - - - --- 2019-10-10 Souza, Jose New
[3/4] drm/i915/display: DFSM CDCLK LIMIT is only available in BXT [1/4] drm/i915/display: Handle fused off display correctly - - - --- 2019-10-10 Souza, Jose New
[2/4] drm/i915/display: Handle fused off HDCP [1/4] drm/i915/display: Handle fused off display correctly - 1 - --- 2019-10-10 Souza, Jose New
[1/4] drm/i915/display: Handle fused off display correctly [1/4] drm/i915/display: Handle fused off display correctly - - - --- 2019-10-10 Souza, Jose New
drm/i915/mg: Use tc_port instead of port parameter to MG registers drm/i915/mg: Use tc_port instead of port parameter to MG registers - - - --- 2019-10-01 Souza, Jose New
drm/i915/tc: Implement the TC cold exit sequence drm/i915/tc: Implement the TC cold exit sequence - - - --- 2019-10-01 Souza, Jose New
[CI,4/4] drm/i915/tgl: initialize TC and TBT ports [CI,1/4] drm/i915/tc: Update DP_MODE programming 1 1 - --- 2019-09-26 Souza, Jose New
[CI,3/4] drm/i915/tgl: Fix dkl link training [CI,1/4] drm/i915/tc: Update DP_MODE programming - 1 - --- 2019-09-26 Souza, Jose New
[CI,2/4] drm/i915/tgl: Add dkl phy programming sequences [CI,1/4] drm/i915/tc: Update DP_MODE programming - 1 - --- 2019-09-26 Souza, Jose New
[CI,1/4] drm/i915/tc: Update DP_MODE programming [CI,1/4] drm/i915/tc: Update DP_MODE programming - 1 - --- 2019-09-26 Souza, Jose New
[v4,4/4] drm/i915/tgl: initialize TC and TBT ports TGL TC enabling v4 1 1 - --- 2019-09-25 Souza, Jose New
[v4,3/4] drm/i915/tgl: Fix dkl link training TGL TC enabling v4 - 1 - --- 2019-09-25 Souza, Jose New
[v4,2/4] drm/i915/tgl: Add dkl phy programming sequences TGL TC enabling v4 - 1 - --- 2019-09-25 Souza, Jose New
[v4,1/4] drm/i915/tc: Update DP_MODE programming TGL TC enabling v4 - 1 - --- 2019-09-25 Souza, Jose New
[CI,6/6] drm/i915/tgl: Return the mg/dkl pll as DDI clock for new TC ports [CI,1/6] drm/i915/tgl: Add initial dkl pll support - 1 - --- 2019-09-24 Souza, Jose New
[CI,5/6] drm/i915/tgl: Add dkl phy pll calculations [CI,1/6] drm/i915/tgl: Add initial dkl pll support - 1 - --- 2019-09-24 Souza, Jose New
[CI,4/6] drm/i915/tgl: re-indent code to prepare for DKL changes [CI,1/6] drm/i915/tgl: Add initial dkl pll support - 1 - --- 2019-09-24 Souza, Jose New
[CI,3/6] drm/i915/tgl: TC helper function to return pin mapping [CI,1/6] drm/i915/tgl: Add initial dkl pll support - 1 - --- 2019-09-24 Souza, Jose New
[CI,2/6] drm/i915/tgl: Add support for dkl pll write [CI,1/6] drm/i915/tgl: Add initial dkl pll support - 1 - --- 2019-09-24 Souza, Jose New
[CI,1/6] drm/i915/tgl: Add initial dkl pll support [CI,1/6] drm/i915/tgl: Add initial dkl pll support 1 1 - --- 2019-09-24 Souza, Jose New
[v3,9/9] drm/i915/tgl: initialize TC and TBT ports TGL TC enabling v3 - - - --- 2019-09-23 Souza, Jose New
[v3,8/9] drm/i915/tgl: Return the mg/dkl pll as DDI clock for new TC ports TGL TC enabling v3 - 1 - --- 2019-09-23 Souza, Jose New
[v3,7/9] drm/i915/tgl: Fix dkl link training TGL TC enabling v3 - - - --- 2019-09-23 Souza, Jose New
[v3,6/9] drm/i915/tgl: Add dkl phy pll calculations TGL TC enabling v3 - 1 - --- 2019-09-23 Souza, Jose New
[v3,5/9] drm/i915/tgl: re-indent code to prepare for DKL changes TGL TC enabling v3 - 1 - --- 2019-09-23 Souza, Jose New
[v3,4/9] drm/i915/tgl: Add dkl phy programming sequences TGL TC enabling v3 - - - --- 2019-09-23 Souza, Jose New
[v3,3/9] drm/i915/tgl: TC helper function to return pin mapping TGL TC enabling v3 - 1 - --- 2019-09-23 Souza, Jose New
[v3,2/9] drm/i915/tgl: Add support for dkl pll write TGL TC enabling v3 - 1 - --- 2019-09-23 Souza, Jose New
[v3,1/9] drm/i915/tgl: Add initial dkl pll support TGL TC enabling v3 1 1 - --- 2019-09-23 Souza, Jose New
[CI,6/6] drm/i915/tgl: Check the UC health of tc controllers after power on TGL TC enabling v2-CI - 1 - --- 2019-09-20 Souza, Jose New
[CI,5/6] drm/i915/icl: Unify disable and enable phy clock gating functions TGL TC enabling v2-CI - 1 - --- 2019-09-20 Souza, Jose New
[CI,4/6] drm/i915/tgl: Add dkl phy registers TGL TC enabling v2-CI - 1 - --- 2019-09-20 Souza, Jose New
[CI,3/6] drm/i915/tgl/pll: Set update_active_dpll TGL TC enabling v2-CI - 1 - --- 2019-09-20 Souza, Jose New
[CI,2/6] drm/i915/tgl: Finish modular FIA support on registers TGL TC enabling v2-CI - 1 - --- 2019-09-20 Souza, Jose New
[CI,1/6] drm/i915/tgl: Add missing ddi clock select during DP init sequence TGL TC enabling v2-CI - 2 - --- 2019-09-20 Souza, Jose New
[v2,13/13] drm/i915/tgl: initialize TC and TBT ports TGL TC enabling v2 - - - --- 2019-09-19 Souza, Jose New
[v2,12/13] drm/i915/tgl: Fix dkl link training TGL TC enabling v2 - - - --- 2019-09-19 Souza, Jose New
[v2,11/13] drm/i915/tgl: Add dkl phy pll calculations TGL TC enabling v2 - - - --- 2019-09-19 Souza, Jose New
[v2,10/13] drm/i915/tgl: Check the UC health of tc controllers after power on TGL TC enabling v2 - 1 - --- 2019-09-19 Souza, Jose New
[v2,09/13] drm/i915/icl: Unify disable and enable phy clock gating functions TGL TC enabling v2 - 1 - --- 2019-09-19 Souza, Jose New
[v2,08/13] drm/i915/tgl: Add dkl phy programming sequences TGL TC enabling v2 - - - --- 2019-09-19 Souza, Jose New
[v2,07/13] drm/i915/tgl: TC helper function to return pin mapping TGL TC enabling v2 - 1 - --- 2019-09-19 Souza, Jose New
[v2,06/13] drm/i915/tgl: Add support for dkl pll write TGL TC enabling v2 - 1 - --- 2019-09-19 Souza, Jose New
[v2,05/13] drm/i915/tgl: Add initial dkl pll support TGL TC enabling v2 - - - --- 2019-09-19 Souza, Jose New
[v2,04/13] drm/i915/tgl: Add dkl phy registers TGL TC enabling v2 - 1 - --- 2019-09-19 Souza, Jose New
[v2,03/13] drm/i915/tgl/pll: Set update_active_dpll TGL TC enabling v2 - 1 - --- 2019-09-19 Souza, Jose New
[v2,02/13] drm/i915/tgl: Finish modular FIA support on registers TGL TC enabling v2 - - - --- 2019-09-19 Souza, Jose New
[v2,01/13] drm/i915/tgl: Add missing ddi clock select during DP init sequence TGL TC enabling v2 - 2 - --- 2019-09-19 Souza, Jose New
[CI,2/2] drm/connector: Allow max possible encoders to attach to a connector [CI,1/2] drm/connector: Share with non-atomic drivers the function to get the single encoder - 1 - --- 2019-09-13 Souza, Jose New
[CI,1/2] drm/connector: Share with non-atomic drivers the function to get the single encoder [CI,1/2] drm/connector: Share with non-atomic drivers the function to get the single encoder - 2 - --- 2019-09-13 Souza, Jose New
[14/14] drm/i915/tgl: initialize TC and TBT ports TGL TC enabling - - - --- 2019-09-13 Souza, Jose New
[13/14] drm/i915/tgl: Use dkl pll hardcoded values TGL TC enabling - - - --- 2019-09-13 Souza, Jose New
[12/14] drm/i915: Add dkl phy pll calculations TGL TC enabling - - - --- 2019-09-13 Souza, Jose New
[11/14] drm/i915/tgl: Check the UC health of tc controllers after power on TGL TC enabling - - - --- 2019-09-13 Souza, Jose New
[10/14] drm/i915/tgl: Fix dkl phy register space addressing TGL TC enabling - - - --- 2019-09-13 Souza, Jose New
[09/14] drm/i915/icl: Unify disable and enable phy clock gating functions TGL TC enabling - - - --- 2019-09-13 Souza, Jose New
[08/14] drm/i915/tgl: Add dkl phy programming sequences TGL TC enabling - - - --- 2019-09-13 Souza, Jose New
[07/14] drm/i915/tgl: Add support for dkl pll write TGL TC enabling - - - --- 2019-09-13 Souza, Jose New
[06/14] drm/i915/tgl: Add initial dkl pll support TGL TC enabling - - - --- 2019-09-13 Souza, Jose New
[05/14] drm/i915/tgl: Add dkl phy registers TGL TC enabling - - - --- 2019-09-13 Souza, Jose New
[04/14] drm/i915/tgl: Fix driver crash when update_active_dpll is called TGL TC enabling - - - --- 2019-09-13 Souza, Jose New
[03/14] drm/i915/tgl: Finish modular FIA support on registers TGL TC enabling - - - --- 2019-09-13 Souza, Jose New
[02/14] drm/i915/tgl: TC helper function to return pin mapping TGL TC enabling - - - --- 2019-09-13 Souza, Jose New
[01/14] drm/i915/tgl: Add missing ddi clock select during DP init sequence TGL TC enabling - - - --- 2019-09-13 Souza, Jose New
[2/2] drm/connector: Allow max possible encoders to attach to a connector [1/2] drm/connector: Share with non-atomic drivers the function to get the single encoder - 1 - --- 2019-09-12 Souza, Jose New
[1/2] drm/connector: Share with non-atomic drivers the function to get the single encoder [1/2] drm/connector: Share with non-atomic drivers the function to get the single encoder - 2 - --- 2019-09-12 Souza, Jose New
[4/4] drm/i915/tgl: Fix driver crash when update_active_dpll is called [1/4] drm/i915/tgl: Add missing ddi clock select during DP init sequence - - - --- 2019-09-12 Souza, Jose New
[3/4] drm/i915/tgl: Finish modular FIA support on registers [1/4] drm/i915/tgl: Add missing ddi clock select during DP init sequence - - - --- 2019-09-12 Souza, Jose New
[2/4] drm/i915/tgl: TC helper function to return pin mapping [1/4] drm/i915/tgl: Add missing ddi clock select during DP init sequence - - - --- 2019-09-12 Souza, Jose New
[1/4] drm/i915/tgl: Add missing ddi clock select during DP init sequence [1/4] drm/i915/tgl: Add missing ddi clock select during DP init sequence - - - --- 2019-09-12 Souza, Jose New
[2/2] drm/connector: Allow max possible encoders to attach to a connector [1/2] drm/connector: Share with non-atomic drivers the function to get the single encoder - 1 - --- 2019-09-11 Souza, Jose New
[1/2] drm/connector: Share with non-atomic drivers the function to get the single encoder [1/2] drm/connector: Share with non-atomic drivers the function to get the single encoder - - - --- 2019-09-11 Souza, Jose New
[v2.1] drm/connector: Allow max possible encoders to attach to a connector [v2.1] drm/connector: Allow max possible encoders to attach to a connector - - - --- 2019-09-05 Souza, Jose New
[v2] drm/connector: Allow max possible encoders to attach to a connector [v2] drm/connector: Allow max possible encoders to attach to a connector - 1 - --- 2019-09-05 Souza, Jose New
[2/2] drm/i915/mst: Do not hardcoded the crtcs that encoder can connect [1/2] drm/i915: Apply FBC WA for TGL too - 1 - --- 2019-09-04 Souza, Jose New
[1/2] drm/i915: Apply FBC WA for TGL too [1/2] drm/i915: Apply FBC WA for TGL too - 1 - --- 2019-09-04 Souza, Jose New
[6/6] drm/i915/tgl: add gen12 to stolen initialization Tiger Lake batch 3.5 v2 - 2 - --- 2019-09-04 Souza, Jose New
[5/6] drm/i915/tgl: disable SAGV temporarily Tiger Lake batch 3.5 v2 - 1 - --- 2019-09-04 Souza, Jose New
[4/6] drm/i915/tgl: move DP_TP_* to transcoder Tiger Lake batch 3.5 v2 - 2 - --- 2019-09-04 Souza, Jose New
[3/6] drm/i915: protect access to DP_TP_* on non-dp Tiger Lake batch 3.5 v2 - 1 - --- 2019-09-04 Souza, Jose New
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