Show patches with: Submitter = Ville Syrjälä       |   8328 patches
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Patch Series A/R/T S/W/F Date Submitter Delegate State
[1/3] drm/i915: Use FORCEWAKE_KERNEL instead of hardcoded number in MT forcewake ACK - - - --- 2013-03-01 Ville Syrjälä New
[3/3] drm/i915: Kill a few pointless comments - - - --- 2013-02-28 Ville Syrjälä New
[2/3] drm/i915: Remove a stale and misplaced comment - - - --- 2013-02-28 Ville Syrjälä New
[1/3] drm/i915: Document the find_pll() function - - - --- 2013-02-28 Ville Syrjälä New
[v2] drm/i915: Don't clobber crtc->fb when queue_flip fails - - - --- 2013-02-22 Ville Syrjälä New
drm/i915: Add to_user_ptr() - - - --- 2013-02-22 Ville Syrjälä New
drm/i915: Fix a bogus cast in execbuffer2 - - - --- 2013-02-22 Ville Syrjälä New
drm/i915: Don't clobber crtc->fb when queue_flip fails - - - --- 2013-02-22 Ville Syrjälä New
[4/4] drm/i915: Implement proper clipping for video sprites - - - --- 2013-02-21 Ville Syrjälä New
[3/4] drm: Add drm_region_debug() - - - --- 2013-02-21 Ville Syrjälä New
[2/4] drm: Add drm_calc_{hscale, vscale}() utility functions - - - --- 2013-02-21 Ville Syrjälä New
[1/4] drm: Add struct drm_region and assorted utility functions - - - --- 2013-02-21 Ville Syrjälä New
drm/i915: Kill pipestat[] cache - - - --- 2013-02-20 Ville Syrjälä New
drm/i915: Use I915_MAX_PIPES instead of hardcoded value - - - --- 2013-02-20 Ville Syrjälä New
[v2] drm/i915: Refactor gen2 to gen4 vblank interrupt handling - - - --- 2013-02-19 Ville Syrjälä New
[v2,2/2] drm/i915: Fix races in gen4 page flip interrupt handling - - - --- 2013-02-19 Ville Syrjälä New
[v3,1/2] drm/i915: Eliminate race from gen2/3 page flip interrupt handling - - - --- 2013-02-19 Ville Syrjälä New
[libdrm,2/2] intel_chipset: Fix up VLV confusion - - - --- 2013-02-18 Ville Syrjälä New
[libdrm,1/2] intel_chipset: Use parens around macro arguments - - - --- 2013-02-18 Ville Syrjälä New
[i-g-t,2/2] intel_chipset: Add multiple inclusion guards into intel_chipset.h - - - --- 2013-02-18 Ville Syrjälä New
[i-g-t,1/2] intel_chipset: Use parens around macro arguments - - - --- 2013-02-18 Ville Syrjälä New
[v3,2/2] drm/i915: Finish page flips and update primary planes after a GPU reset - - - --- 2013-02-18 Ville Syrjälä New
[v2,1/2] drm/i915: Really wait for pending flips when panning - - - --- 2013-02-18 Ville Syrjälä New
[RFC] drm/i915: Fix races in gen4 page flip interrupt handling - - - --- 2013-02-18 Ville Syrjälä New
[v2] drm/i915: Eliminate race from gen2/3 page flip interrupt handling - - - --- 2013-02-18 Ville Syrjälä New
drm/i915: Eliminate race from gen2/3 page flip interrupt handling - - - --- 2013-02-18 Ville Syrjälä New
[v2] drm/i915: Finish page flips and update primary planes after a GPU reset - - - --- 2013-02-15 Ville Syrjälä New
[i-g-t,2/2] kms_flip: Add a flip-vs-panning-vs-hang test - - - --- 2013-02-15 Ville Syrjälä New
[i-g-t,1/2] kms_flip: Split the "no events" logic into a separate flag - - - --- 2013-02-15 Ville Syrjälä New
[3/3] drm/i915: Update primary planes after a GPU reset - - - --- 2013-02-15 Ville Syrjälä New
[v2,2/3] drm/i915: Really wait for pending flips when panning - - - --- 2013-02-15 Ville Syrjälä New
[v2,1/3] drm/i915: Wake up pending_flip_queue as part of reset handling - - - --- 2013-02-15 Ville Syrjälä New
[v2] drm/i915: Fix PIPE_CONTROL DW/QW write through global GTT on IVB+ - - - --- 2013-02-14 Ville Syrjälä New
[2/2] drm/i915: Fix PIPE_CONTROL DW/QW write through global GTT on IVB+ - - - --- 2013-02-12 Ville Syrjälä New
[1/2] drm/i915: Print the pipe control page GTT address - - - --- 2013-02-12 Ville Syrjälä New
drm/i915: Fix sprite_scaling_enabled for multiple sprites - - - --- 2013-02-08 Ville Syrjälä New
[2/2] drm: Use C8 instead of RGB332 when determining the format from depth/bpp - - - --- 2013-01-31 Ville Syrjälä New
[1/2] drm: Fill depth/bits_per_pixel for C8 format - - - --- 2013-01-31 Ville Syrjälä New
[i-g-t,2/2] kms_flip: Add flip-vs-modeset-vs-hang test - - - --- 2013-01-30 Ville Syrjälä New
[i-g-t,1/2] kms_flip: Make flip events optional - - - --- 2013-01-30 Ville Syrjälä New
[6/6] drm/i915: Really wait for pending flips in intel_pipe_set_base() - - - --- 2013-01-29 Ville Syrjälä New
[5/6] drm/i915: Add intel_crtc_wait_for_pending_flips_locked() - - - --- 2013-01-29 Ville Syrjälä New
[4/6] drm/i915: Move intel_crtc_has_pending_flip() earlier - - - --- 2013-01-29 Ville Syrjälä New
[3/6] drm/i915: Wake up pending_flip_queue as part of reset handling - - - --- 2013-01-29 Ville Syrjälä New
[2/6] drm/i915: Don't wait for page flips if there was GPU reset - - - --- 2013-01-29 Ville Syrjälä New
[1/6] drm/i915: Kill obj->pending_flip - - - --- 2013-01-29 Ville Syrjälä New
[9/9] drm/i915: Don't touch VGA0/VGA1/VGA_PD on ILK+ - - - --- 2013-01-25 Ville Syrjälä New
[8/9] drm/i915: Set the SR01 "screen off" bit in i915_redisable_vga() too - - - --- 2013-01-25 Ville Syrjälä New
[7/9] drm/i915: Kill IS_DISPLAYREG() - - - --- 2013-01-25 Ville Syrjälä New
[6/9] drm/i915: Introduce i915_vgacntrl_reg() - - - --- 2013-01-25 Ville Syrjälä New
[5/9] drm/i915: Include display_mmio_offset in sequencer index/data registers - - - --- 2013-01-25 Ville Syrjälä New
[v2,4/9] drm/i915: Pass VLV_DISPLAY_BASE + reg to intel_{hdmi, dp}_init on VLV - - - --- 2013-01-25 Ville Syrjälä New
[3/9] drm/i915: VLV doesn't have SDVO - - - --- 2013-01-25 Ville Syrjälä New
[2/9] drm/i915: Always use adpa_reg - - - --- 2013-01-25 Ville Syrjälä New
[v2,1/9] drm/i915: PLL registers need an offset on VLV - - - --- 2013-01-25 Ville Syrjälä New
[33/33] drm/i915: Kill VLV specific interrupts registers - - - --- 2013-01-24 Ville Syrjälä New
[32/33] drm/i915: Kill IS_DISPLAYREG() - - - --- 2013-01-24 Ville Syrjälä New
[31/33] drm/i915: Set display_mmio_offset for VLV - - - --- 2013-01-24 Ville Syrjälä New
[30/33] drm/i915: GPIO/GMBUS registers need an offset on VLV - - - --- 2013-01-24 Ville Syrjälä New
[29/33] drm/i915: VGA registers need an offset on VLV - - - --- 2013-01-24 Ville Syrjälä New
[28/33] drm/i915: DPIO registers are VLV only and need an offset - - - --- 2013-01-24 Ville Syrjälä New
[27/33] drm/i915: Spell out VLV_DISPLAY_BASE for interrupt registers - - - --- 2013-01-24 Ville Syrjälä New
[26/33] drm/i915: Make VLV_GUNIT_CLOCK_GATE register value more readable - - - --- 2013-01-24 Ville Syrjälä New
[25/33] drm/i915: PLL and clock gating registers need an offset on VLV - - - --- 2013-01-24 Ville Syrjälä New
[24/33] drm/i915: VLV doesn't seem to have VGA0/VGA1/VGA_PD registers - - - --- 2013-01-24 Ville Syrjälä New
[23/33] drm/i915: FB_BLC_SELF_VLV is VLV only and needs an offset - - - --- 2013-01-24 Ville Syrjälä New
[22/33] drm/i915: Pipe palette registers need an offset on VLV - - - --- 2013-01-24 Ville Syrjälä New
[21/33] drm/i915: Pipe timing registers need an offset on VLV - - - --- 2013-01-24 Ville Syrjälä New
[20/33] drm/i915: VLV_ADPA must be used in VLV code - - - --- 2013-01-24 Ville Syrjälä New
[19/33] drm/i915: PORT_HOTPLUG registers need an offset on VLV - - - --- 2013-01-24 Ville Syrjälä New
[18/33] drm/i915: Panel fitter registers need an offset on VLV - - - --- 2013-01-24 Ville Syrjälä New
[17/33] drm/i915: Pass VLV_DISPLAY_BASE + reg to intel_init_{sdvo, hdmi, dp} on VLV - - - --- 2013-01-24 Ville Syrjälä New
[16/33] drm/i915: DPFLIPSTAT and DPINVGTT registers are VLV only and need an offset - - - --- 2013-01-24 Ville Syrjälä New
[15/33] drm/i915: DSPARB register needs an offset on VLV - - - --- 2013-01-24 Ville Syrjälä New
[14/33] drm/i915: DSPFW registers need an offset on VLV - - - --- 2013-01-24 Ville Syrjälä New
[13/33] drm/i915: VLV_DDL is VLV only and needs an offset - - - --- 2013-01-24 Ville Syrjälä New
[12/33] drm/i915: Cursor registers need an offset on VLV - - - --- 2013-01-24 Ville Syrjälä New
[11/33] drm/i915: Pipe registers need an offset on VLV - - - --- 2013-01-24 Ville Syrjälä New
[10/33] drm/i915: Primary plane registers need an offset on VLV - - - --- 2013-01-24 Ville Syrjälä New
[09/33] drm/i915: VGACNTRL needs an offset on VLV - - - --- 2013-01-24 Ville Syrjälä New
[08/33] drm/i915: SWF screatch registers need an offset on VLV - - - --- 2013-01-24 Ville Syrjälä New
[07/33] drm/i915: PIPE M/N registers need an offset on VLV - - - --- 2013-01-24 Ville Syrjälä New
[06/33] drm/i915: VLV_VIDEO_DIP_CTL is for VLV only - - - --- 2013-01-24 Ville Syrjälä New
[05/33] drm/i915: Per-pipe PP registers are for VLV only - - - --- 2013-01-24 Ville Syrjälä New
[04/33] drm/i915: AUD_VID_DID needs an offset on VLV - - - --- 2013-01-24 Ville Syrjälä New
[03/33] drm/i915: Add display_display_mmio_offset to intel_device_info - - - --- 2013-01-24 Ville Syrjälä New
[02/33] drm/i915: Convert intel_dp to enum port - - - --- 2013-01-24 Ville Syrjälä New
[01/33] drm/i915: Convert intel_hdmi to enum port - - - --- 2013-01-24 Ville Syrjälä New
[RFC] drm/i915: Get rid of IS_DISPLAYREG() - - - --- 2013-01-22 Ville Syrjälä New
drm/i915: Implement pipe CSC based limited range RGB output - - - --- 2013-01-18 Ville Syrjälä New
[v2,4/4] drm/i915: Provide the quantization range in the AVI infoframe - - - --- 2013-01-17 Ville Syrjälä New
[v2,3/4] drm/edid: Add drm_rgb_quant_range_selectable() - - - --- 2013-01-17 Ville Syrjälä New
[v3,2/4] drm/i915: Add "Automatic" mode for the "Broadcast RGB" property - - - --- 2013-01-17 Ville Syrjälä New
[v3,1/4] drm/i915: Fix RGB color range property for PCH platforms - - - --- 2013-01-17 Ville Syrjälä New
drm/i915: Fix SPRITE0_FLIP_DONE_INT_EN_VLV and SPRITE0_FLIPDONE_INT_STATUS_VLV - - - --- 2013-01-16 Ville Syrjälä New
[4/4] drm/i915: Provide the quantization range in the AVI infoframe - - - --- 2013-01-16 Ville Syrjälä New
[3/4] drm/edid: Add drm_rgb_quant_range_selectable() - - - --- 2013-01-16 Ville Syrjälä New
[2/4] drm/i915: Add "Automatic" mode for the "Broadcast RGB" property - - - --- 2013-01-16 Ville Syrjälä New
[1/4] drm/i915: Fix RGB color range property for PCH platforms - - - --- 2013-01-16 Ville Syrjälä New
[5/5] drm/i915: Provide the quantization range in the AVI infoframe - - - --- 2013-01-14 Ville Syrjälä New
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