Message ID | 0013df8e5c8e8443bd790bbc9e10ad5a05d8a2fd.1574775655.git.jani.nikula@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | drm/i915/dsi: enable DSC | expand |
> -----Original Message----- > From: Jani Nikula <jani.nikula@intel.com> > Sent: Tuesday, November 26, 2019 7:13 PM > To: intel-gfx@lists.freedesktop.org > Cc: Nikula, Jani <jani.nikula@intel.com>; Kulkarni, Vandita > <vandita.kulkarni@intel.com>; Ville Syrjälä <ville.syrjala@linux.intel.com> > Subject: [PATCH v3 07/13] drm/i915/dsi: set pipe_bpp on ICL configure config > > The ICL DSI pipe_bpp currently comes from compute_baseline_pipe_bpp(). > Fix it. > > Cc: Vandita Kulkarni <vandita.kulkarni@intel.com> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> > Signed-off-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/display/icl_dsi.c | 5 +++++ > 1 file changed, 5 insertions(+) > > diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c > b/drivers/gpu/drm/i915/display/icl_dsi.c > index f688207932e0..ef53ed6d3ecf 100644 > --- a/drivers/gpu/drm/i915/display/icl_dsi.c > +++ b/drivers/gpu/drm/i915/display/icl_dsi.c > @@ -1286,6 +1286,11 @@ static int gen11_dsi_compute_config(struct > intel_encoder *encoder, > else > pipe_config->cpu_transcoder = TRANSCODER_DSI_0; > Can we use mipi_dsi_pixel_format_to_bpp? > + if (intel_dsi->pixel_format == MIPI_DSI_FMT_RGB888) > + pipe_config->pipe_bpp = 24; > + else > + pipe_config->pipe_bpp = 18; > + Otherwise LGTM. Reviewed-by: Vandita Kulkarni <vandita.kulkarni@intel.com> Thanks, Vandita > pipe_config->clock_set = true; > pipe_config->port_clock = intel_dsi_bitrate(intel_dsi) / 5; > > -- > 2.20.1
On Thu, 05 Dec 2019, "Kulkarni, Vandita" <vandita.kulkarni@intel.com> wrote: >> -----Original Message----- >> From: Jani Nikula <jani.nikula@intel.com> >> Sent: Tuesday, November 26, 2019 7:13 PM >> To: intel-gfx@lists.freedesktop.org >> Cc: Nikula, Jani <jani.nikula@intel.com>; Kulkarni, Vandita >> <vandita.kulkarni@intel.com>; Ville Syrjälä <ville.syrjala@linux.intel.com> >> Subject: [PATCH v3 07/13] drm/i915/dsi: set pipe_bpp on ICL configure config >> >> The ICL DSI pipe_bpp currently comes from compute_baseline_pipe_bpp(). >> Fix it. >> >> Cc: Vandita Kulkarni <vandita.kulkarni@intel.com> >> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> >> Signed-off-by: Jani Nikula <jani.nikula@intel.com> >> --- >> drivers/gpu/drm/i915/display/icl_dsi.c | 5 +++++ >> 1 file changed, 5 insertions(+) >> >> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c >> b/drivers/gpu/drm/i915/display/icl_dsi.c >> index f688207932e0..ef53ed6d3ecf 100644 >> --- a/drivers/gpu/drm/i915/display/icl_dsi.c >> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c >> @@ -1286,6 +1286,11 @@ static int gen11_dsi_compute_config(struct >> intel_encoder *encoder, >> else >> pipe_config->cpu_transcoder = TRANSCODER_DSI_0; >> > > Can we use mipi_dsi_pixel_format_to_bpp? No, this is for the pipe which is different from what goes on the DSI. BR, Jani. > >> + if (intel_dsi->pixel_format == MIPI_DSI_FMT_RGB888) >> + pipe_config->pipe_bpp = 24; >> + else >> + pipe_config->pipe_bpp = 18; >> + > Otherwise LGTM. > Reviewed-by: Vandita Kulkarni <vandita.kulkarni@intel.com> > > Thanks, > Vandita >> pipe_config->clock_set = true; >> pipe_config->port_clock = intel_dsi_bitrate(intel_dsi) / 5; >> >> -- >> 2.20.1 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c index f688207932e0..ef53ed6d3ecf 100644 --- a/drivers/gpu/drm/i915/display/icl_dsi.c +++ b/drivers/gpu/drm/i915/display/icl_dsi.c @@ -1286,6 +1286,11 @@ static int gen11_dsi_compute_config(struct intel_encoder *encoder, else pipe_config->cpu_transcoder = TRANSCODER_DSI_0; + if (intel_dsi->pixel_format == MIPI_DSI_FMT_RGB888) + pipe_config->pipe_bpp = 24; + else + pipe_config->pipe_bpp = 18; + pipe_config->clock_set = true; pipe_config->port_clock = intel_dsi_bitrate(intel_dsi) / 5;
The ICL DSI pipe_bpp currently comes from compute_baseline_pipe_bpp(). Fix it. Cc: Vandita Kulkarni <vandita.kulkarni@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/i915/display/icl_dsi.c | 5 +++++ 1 file changed, 5 insertions(+)