@@ -1595,6 +1595,17 @@ static void glk_read_luts(struct intel_crtc_state *crtc_state)
crtc_state->base.gamma_lut = bdw_read_lut_10(crtc_state, PAL_PREC_INDEX_VALUE(0));
}
+static void bdw_read_luts(struct intel_crtc_state *crtc_state)
+{
+ if (crtc_state->gamma_mode == GAMMA_MODE_MODE_8BIT)
+ crtc_state->base.gamma_lut = i9xx_read_lut_8(crtc_state);
+ else if (crtc_state->gamma_mode == GAMMA_MODE_MODE_SPLIT)
+ crtc_state->base.gamma_lut = bdw_read_lut_10(crtc_state, PAL_PREC_SPLIT_MODE |
+ PAL_PREC_INDEX_VALUE(512));
+ else
+ crtc_state->base.gamma_lut = bdw_read_lut_10(crtc_state, PAL_PREC_INDEX_VALUE(0));
+}
+
void intel_color_init(struct intel_crtc *crtc)
{
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -1642,9 +1653,10 @@ void intel_color_init(struct intel_crtc *crtc)
} else if (IS_CANNONLAKE(dev_priv) || IS_GEMINILAKE(dev_priv)) {
dev_priv->display.load_luts = glk_load_luts;
dev_priv->display.read_luts = glk_read_luts;
- }
- else if (INTEL_GEN(dev_priv) >= 8)
+ } else if (INTEL_GEN(dev_priv) >= 8) {
dev_priv->display.load_luts = bdw_load_luts;
+ dev_priv->display.read_luts = bdw_read_luts;
+ }
else if (INTEL_GEN(dev_priv) >= 7)
dev_priv->display.load_luts = ivb_load_luts;
else
In this patch, gamma and degamma hw blobs are created for BDW. v4: -No need to initialize *blob [Jani] -Removed right shifts [Jani] -Dropped dev local var [Jani] v5: -Returned blob instead of assigning it internally within the function [Ville] -Renamed bdw_get_color_config() to bdw_read_luts() [Ville] Signed-off-by: Swati Sharma <swati2.sharma@intel.com> --- drivers/gpu/drm/i915/intel_color.c | 16 ++++++++++++++-- 1 file changed, 14 insertions(+), 2 deletions(-)