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[2/5] drm/i915: Fix VLV/CHV sprite src colorkey mask

Message ID 20180529182804.8571-2-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show

Commit Message

Ville Syrjälä May 29, 2018, 6:28 p.m. UTC 
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

VLV/CHV sprites use the old plane C layout of the colorkey mask
register. Insted of 8 bit masks for each RGB component in the
lower bits, the register only has the per channel src key enable
bits. On g4x+ sprites those bits are 24,25,26 whereas on the
old plane C and VLV/CHV sprites they are bits 0,1,2. Since
userspace assumes the g4x+ layout let's just shift enable
bits down and ignore the full masks.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_sprite.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
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Patch

diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 6164c2ca20c3..f6be9b1b9c3a 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -548,7 +548,7 @@  vlv_update_plane(struct intel_plane *plane,
 	if (key->flags) {
 		I915_WRITE_FW(SPKEYMINVAL(pipe, plane_id), key->min_value);
 		I915_WRITE_FW(SPKEYMAXVAL(pipe, plane_id), key->max_value);
-		I915_WRITE_FW(SPKEYMSK(pipe, plane_id), key->channel_mask);
+		I915_WRITE_FW(SPKEYMSK(pipe, plane_id), key->channel_mask >> 24);
 	}
 	I915_WRITE_FW(SPSTRIDE(pipe, plane_id), fb->pitches[0]);
 	I915_WRITE_FW(SPPOS(pipe, plane_id), (crtc_y << 16) | crtc_x);