diff mbox series

[v5,28/28] drm/i915/dsc: Force DSC enable if requested by IGT/userspace

Message ID 20181005232306.31133-29-manasi.d.navare@intel.com (mailing list archive)
State New, archived
Headers show
Series Display Stream Compression enabling on eDP/DP | expand

Commit Message

Navare, Manasi Oct. 5, 2018, 11:23 p.m. UTC 
Currently the driver will only enable DSC if a certain mode
does not fit the available link BW. However IGT/userspace
can force DSC enable through dsc support debugfs node to
test the DSC functionality if supported by the panel.

Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 52dca5901aa1..987d3b2eb8d3 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -2158,12 +2158,13 @@  intel_dp_compute_link_config(struct intel_encoder *encoder,
 							&limits);
 
 	/* enable compression if the mode doesn't fit available BW */
-	if (!ret) {
-		DRM_DEBUG_KMS("DP required Link rate %i does not fit available %i\n",
-			      intel_dp_link_required(adjusted_mode->crtc_clock,
-						     pipe_config->pipe_bpp),
-			      intel_dp_max_data_rate(pipe_config->port_clock,
-						     pipe_config->lane_count));
+	if (!ret || intel_dp->force_dsc_en) {
+		if (!ret)
+			DRM_DEBUG_KMS("DP required Link rate %i does not fit available %i\n",
+				      intel_dp_link_required(adjusted_mode->crtc_clock,
+							     pipe_config->pipe_bpp),
+				      intel_dp_max_data_rate(pipe_config->port_clock,
+							     pipe_config->lane_count));
 
 		if (!intel_dp_dsc_compute_config(intel_dp, pipe_config,
 						 &limits))