@@ -2537,6 +2537,9 @@ static uint32_t ilk_compute_pri_wm(const struct intel_crtc_state *cstate,
uint32_t method1, method2;
int cpp;
+ if (latency == 0)
+ return USHRT_MAX;
+
if (!intel_wm_plane_visible(cstate, pstate))
return 0;
@@ -2564,6 +2567,9 @@ static uint32_t ilk_compute_spr_wm(const struct intel_crtc_state *cstate,
uint32_t method1, method2;
int cpp;
+ if (latency == 0)
+ return USHRT_MAX;
+
if (!intel_wm_plane_visible(cstate, pstate))
return 0;
@@ -2585,6 +2591,9 @@ static uint32_t ilk_compute_cur_wm(const struct intel_crtc_state *cstate,
int latency = intel_plane_wm_latency(plane, level);
int cpp;
+ if (latency == 0)
+ return USHRT_MAX;
+
if (!intel_wm_plane_visible(cstate, pstate))
return 0;
@@ -2953,10 +2962,8 @@ static void ilk_setup_wm_latency(struct drm_i915_private *dev_priv)
{
if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
dev_priv->wm.num_levels = 5;
- else if (INTEL_GEN(dev_priv) >= 6)
- dev_priv->wm.num_levels = 4;
else
- dev_priv->wm.num_levels = 3;
+ dev_priv->wm.num_levels = 4;
ilk_read_wm_latency(dev_priv, dev_priv->wm.pri_latency);
ilk_fixup_wm_latency_units(dev_priv, dev_priv->wm.pri_latency);