diff mbox series

[5/7] drm/i915/bdw+: Move misc display IRQ handling to it own function

Message ID 20190403233539.31828-5-jose.souza@intel.com (mailing list archive)
State New, archived
Headers show
Series [1/7] drm/i915/psr: Update PSR2 SU corruption workaround comment | expand

Commit Message

Souza, Jose April 3, 2019, 11:35 p.m. UTC 
Just moving it to reduce the tabs and avoid break code lines.
No behavior changes intended here.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 63 +++++++++++++++++++--------------
 1 file changed, 36 insertions(+), 27 deletions(-)

Comments

Dhinakaran Pandiyan April 5, 2019, 12:38 a.m. UTC | #1 
On Wed, 2019-04-03 at 16:35 -0700, José Roberto de Souza wrote:
> Just moving it to reduce the tabs and avoid break code lines.
> No behavior changes intended here.
> 
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_irq.c | 63 +++++++++++++++++++--------------
>  1 file changed, 36 insertions(+), 27 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index aa107a78cb36..527d5cb21baa 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -2702,41 +2702,50 @@ static u32 gen8_de_port_aux_mask(struct
> drm_i915_private *dev_priv)
>  	return mask;
>  }
>  
> -static irqreturn_t
> -gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
> +static enum irqreturn
> +gen8_de_misc_irq_handler(struct drm_i915_private *dev_priv)
>  {
> -	irqreturn_t ret = IRQ_NONE;
> -	u32 iir;
> -	enum pipe pipe;
> +	u32 iir = I915_READ(GEN8_DE_MISC_IIR);
> +	enum irqreturn ret = IRQ_NONE;
> +	bool found = false;
>  
> -	if (master_ctl & GEN8_DE_MISC_IRQ) {
> -		iir = I915_READ(GEN8_DE_MISC_IIR);
> -		if (iir) {
> -			bool found = false;
> -
> -			I915_WRITE(GEN8_DE_MISC_IIR, iir);
> -			ret = IRQ_HANDLED;
> +	if (!iir) {
> +		DRM_ERROR("The master control interrupt lied (DE MISC)!\n");
> +		return ret;
> +	}
Move the above to the caller and pass the IIR value as a parameter? That would
make it consistent with other handlers in this file. The benefit I see is that I
don't have to look beyond gen8_de_irq_handler() to know what the return value is
going to be.


> -				found = true;
> -			}
> +	I915_WRITE(GEN8_DE_MISC_IIR, iir);
> +	ret = IRQ_HANDLED;
>  
> -			if (iir & GEN8_DE_EDP_PSR) {
> -				u32 psr_iir = I915_READ(EDP_PSR_IIR);
> +	if (iir & GEN8_DE_MISC_GSE) {
> +		intel_opregion_asle_intr(dev_priv);
> +		found = true;
> +	}
>  
> -				intel_psr_irq_handler(dev_priv, psr_iir);
> -				I915_WRITE(EDP_PSR_IIR, psr_iir);
> -				found = true;
> -			}
> +	if (iir & GEN8_DE_EDP_PSR) {
> +		u32 psr_iir = I915_READ(EDP_PSR_IIR);
>  
> -			if (!found)
> -				DRM_ERROR("Unexpected DE Misc interrupt\n");
> -		}
> -		else
> -			DRM_ERROR("The master control interrupt lied (DE
> MISC)!\n");
> +		intel_psr_irq_handler(dev_priv, psr_iir);
> +		I915_WRITE(EDP_PSR_IIR, psr_iir);
> +		found = true;
>  	}
>  
> +	if (!found)
> +		DRM_ERROR("Unexpected DE Misc interrupt\n");
> +
> +	return ret;
> +}
> +
> +static irqreturn_t
> +gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
> +{
> +	irqreturn_t ret = IRQ_NONE;
> +	u32 iir;
> +	enum pipe pipe;
> +
> +	if (master_ctl & GEN8_DE_MISC_IRQ)
> +		ret = gen8_de_misc_irq_handler(dev_priv);
> +
>  	if (INTEL_GEN(dev_priv) >= 11 && (master_ctl & GEN11_DE_HPD_IRQ)) {
>  		iir = I915_READ(GEN11_DE_HPD_IIR);
>  		if (iir) {
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index aa107a78cb36..527d5cb21baa 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2702,41 +2702,50 @@  static u32 gen8_de_port_aux_mask(struct drm_i915_private *dev_priv)
 	return mask;
 }
 
-static irqreturn_t
-gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
+static enum irqreturn
+gen8_de_misc_irq_handler(struct drm_i915_private *dev_priv)
 {
-	irqreturn_t ret = IRQ_NONE;
-	u32 iir;
-	enum pipe pipe;
+	u32 iir = I915_READ(GEN8_DE_MISC_IIR);
+	enum irqreturn ret = IRQ_NONE;
+	bool found = false;
 
-	if (master_ctl & GEN8_DE_MISC_IRQ) {
-		iir = I915_READ(GEN8_DE_MISC_IIR);
-		if (iir) {
-			bool found = false;
-
-			I915_WRITE(GEN8_DE_MISC_IIR, iir);
-			ret = IRQ_HANDLED;
+	if (!iir) {
+		DRM_ERROR("The master control interrupt lied (DE MISC)!\n");
+		return ret;
+	}
 
-			if (iir & GEN8_DE_MISC_GSE) {
-				intel_opregion_asle_intr(dev_priv);
-				found = true;
-			}
+	I915_WRITE(GEN8_DE_MISC_IIR, iir);
+	ret = IRQ_HANDLED;
 
-			if (iir & GEN8_DE_EDP_PSR) {
-				u32 psr_iir = I915_READ(EDP_PSR_IIR);
+	if (iir & GEN8_DE_MISC_GSE) {
+		intel_opregion_asle_intr(dev_priv);
+		found = true;
+	}
 
-				intel_psr_irq_handler(dev_priv, psr_iir);
-				I915_WRITE(EDP_PSR_IIR, psr_iir);
-				found = true;
-			}
+	if (iir & GEN8_DE_EDP_PSR) {
+		u32 psr_iir = I915_READ(EDP_PSR_IIR);
 
-			if (!found)
-				DRM_ERROR("Unexpected DE Misc interrupt\n");
-		}
-		else
-			DRM_ERROR("The master control interrupt lied (DE MISC)!\n");
+		intel_psr_irq_handler(dev_priv, psr_iir);
+		I915_WRITE(EDP_PSR_IIR, psr_iir);
+		found = true;
 	}
 
+	if (!found)
+		DRM_ERROR("Unexpected DE Misc interrupt\n");
+
+	return ret;
+}
+
+static irqreturn_t
+gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
+{
+	irqreturn_t ret = IRQ_NONE;
+	u32 iir;
+	enum pipe pipe;
+
+	if (master_ctl & GEN8_DE_MISC_IRQ)
+		ret = gen8_de_misc_irq_handler(dev_priv);
+
 	if (INTEL_GEN(dev_priv) >= 11 && (master_ctl & GEN11_DE_HPD_IRQ)) {
 		iir = I915_READ(GEN11_DE_HPD_IIR);
 		if (iir) {