| Message ID | 20190711173115.28296-19-lucas.demarchi@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Initial support for Tiger Lake | expand |
On Thu, Jul 11, 2019 at 10:31:12AM -0700, Lucas De Marchi wrote: > Make the icl function generic so it is based on phy type and can be > applied to tgl as well. > > I checked if this could not apply to EHL as well, but unfortunately > there the HPD and DDC/GMBUS pins for DDI C are mapped to TypeC Port 1 > even though it doesn't have TC phy. > > v2: don't add a separate function for TGL, but rather reuse the ICL one > (suggested by Rodrigo) > v3: rebase after the introduction of enum phy and use it for the > conversions > > Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> > --- > drivers/gpu/drm/i915/display/intel_hdmi.c | 36 ++++++----------------- > 1 file changed, 9 insertions(+), 27 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c > index 0ebec69bbbfc..77af0dfd93ce 100644 > --- a/drivers/gpu/drm/i915/display/intel_hdmi.c > +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c > @@ -2930,33 +2930,15 @@ static u8 cnp_port_to_ddc_pin(struct drm_i915_private *dev_priv, > > static u8 icl_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port) > { > - u8 ddc_pin; > + enum phy phy = intel_port_to_phy(dev_priv, port); > > - switch (port) { > - case PORT_A: > - ddc_pin = GMBUS_PIN_1_BXT; > - break; > - case PORT_B: > - ddc_pin = GMBUS_PIN_2_BXT; > - break; > - case PORT_C: > - ddc_pin = GMBUS_PIN_9_TC1_ICP; > - break; > - case PORT_D: > - ddc_pin = GMBUS_PIN_10_TC2_ICP; > - break; > - case PORT_E: > - ddc_pin = GMBUS_PIN_11_TC3_ICP; > - break; > - case PORT_F: > - ddc_pin = GMBUS_PIN_12_TC4_ICP; > - break; > - default: > - MISSING_CASE(port); > - ddc_pin = GMBUS_PIN_2_BXT; > - break; > - } > - return ddc_pin; > + if (intel_phy_is_combo(dev_priv, phy)) > + return GMBUS_PIN_1_BXT + port; > + else if (intel_phy_is_tc(dev_priv, phy)) > + return GMBUS_PIN_9_TC1_ICP + intel_port_to_tc(dev_priv, port); > + > + WARN(1, "Unknown port:%c\n", port_name(port)); > + return GMBUS_PIN_2_BXT; > } > > static u8 mcc_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port) > @@ -3019,7 +3001,7 @@ static u8 intel_hdmi_ddc_pin(struct drm_i915_private *dev_priv, > > if (HAS_PCH_MCC(dev_priv)) > ddc_pin = mcc_port_to_ddc_pin(dev_priv, port); > - else if (HAS_PCH_ICP(dev_priv)) > + else if (HAS_PCH_TGP(dev_priv) || HAS_PCH_ICP(dev_priv)) > ddc_pin = icl_port_to_ddc_pin(dev_priv, port); > else if (HAS_PCH_CNP(dev_priv)) > ddc_pin = cnp_port_to_ddc_pin(dev_priv, port); > -- > 2.21.0 >
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c index 0ebec69bbbfc..77af0dfd93ce 100644 --- a/drivers/gpu/drm/i915/display/intel_hdmi.c +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c @@ -2930,33 +2930,15 @@ static u8 cnp_port_to_ddc_pin(struct drm_i915_private *dev_priv, static u8 icl_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port) { - u8 ddc_pin; + enum phy phy = intel_port_to_phy(dev_priv, port); - switch (port) { - case PORT_A: - ddc_pin = GMBUS_PIN_1_BXT; - break; - case PORT_B: - ddc_pin = GMBUS_PIN_2_BXT; - break; - case PORT_C: - ddc_pin = GMBUS_PIN_9_TC1_ICP; - break; - case PORT_D: - ddc_pin = GMBUS_PIN_10_TC2_ICP; - break; - case PORT_E: - ddc_pin = GMBUS_PIN_11_TC3_ICP; - break; - case PORT_F: - ddc_pin = GMBUS_PIN_12_TC4_ICP; - break; - default: - MISSING_CASE(port); - ddc_pin = GMBUS_PIN_2_BXT; - break; - } - return ddc_pin; + if (intel_phy_is_combo(dev_priv, phy)) + return GMBUS_PIN_1_BXT + port; + else if (intel_phy_is_tc(dev_priv, phy)) + return GMBUS_PIN_9_TC1_ICP + intel_port_to_tc(dev_priv, port); + + WARN(1, "Unknown port:%c\n", port_name(port)); + return GMBUS_PIN_2_BXT; } static u8 mcc_port_to_ddc_pin(struct drm_i915_private *dev_priv, enum port port) @@ -3019,7 +3001,7 @@ static u8 intel_hdmi_ddc_pin(struct drm_i915_private *dev_priv, if (HAS_PCH_MCC(dev_priv)) ddc_pin = mcc_port_to_ddc_pin(dev_priv, port); - else if (HAS_PCH_ICP(dev_priv)) + else if (HAS_PCH_TGP(dev_priv) || HAS_PCH_ICP(dev_priv)) ddc_pin = icl_port_to_ddc_pin(dev_priv, port); else if (HAS_PCH_CNP(dev_priv)) ddc_pin = cnp_port_to_ddc_pin(dev_priv, port);
Make the icl function generic so it is based on phy type and can be applied to tgl as well. I checked if this could not apply to EHL as well, but unfortunately there the HPD and DDC/GMBUS pins for DDI C are mapped to TypeC Port 1 even though it doesn't have TC phy. v2: don't add a separate function for TGL, but rather reuse the ICL one (suggested by Rodrigo) v3: rebase after the introduction of enum phy and use it for the conversions Cc: Anusha Srivatsa <anusha.srivatsa@intel.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> --- drivers/gpu/drm/i915/display/intel_hdmi.c | 36 ++++++----------------- 1 file changed, 9 insertions(+), 27 deletions(-)