Message ID | 20190816080503.28594-11-lucas.demarchi@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Tiger Lake batch 3 | expand |
Verified with respect two B.Spces: 50434 and eDP specs DPCD – Sink "Device PSR Configuration Field" 00170h address. Looks Good to me. On 8/16/2019 1:34 PM, Lucas De Marchi wrote: > From: José Roberto de Souza <jose.souza@intel.com> > > According to BSpc if link standby is set on TGL+, PSR will not be > enabled. Vendors should not use panels that requires link standby and > even if they do, panel should assert a PSR error that will cause PSR to > be disabled. > > BSpec: 50434 > Signed-off-by: José Roberto de Souza <jose.souza@intel.com> > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com> > --- > drivers/gpu/drm/i915/display/intel_psr.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c > index 7e0b370183ad..4cde1b75f901 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.c > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > @@ -1248,8 +1248,8 @@ void intel_psr_init(struct drm_i915_private *dev_priv) > if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) > /* HSW and BDW require workarounds that we don't implement. */ > dev_priv->psr.link_standby = false; > - else > - /* For new platforms let's respect VBT back again */ > + else if (INTEL_GEN(dev_priv) < 12) > + /* For new platforms up to TGL let's respect VBT back again */ > dev_priv->psr.link_standby = dev_priv->vbt.psr.full_link; > > INIT_WORK(&dev_priv->psr.work, intel_psr_work); >
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index 7e0b370183ad..4cde1b75f901 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1248,8 +1248,8 @@ void intel_psr_init(struct drm_i915_private *dev_priv) if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) /* HSW and BDW require workarounds that we don't implement. */ dev_priv->psr.link_standby = false; - else - /* For new platforms let's respect VBT back again */ + else if (INTEL_GEN(dev_priv) < 12) + /* For new platforms up to TGL let's respect VBT back again */ dev_priv->psr.link_standby = dev_priv->vbt.psr.full_link; INIT_WORK(&dev_priv->psr.work, intel_psr_work);