diff mbox series

[v2,26/40] HACK: drm/i915/tgl: Gen12 render context size

Message ID 20190817093902.2171-27-lucas.demarchi@intel.com (mailing list archive)
State New, archived
Headers show
Series Tiger Lake batch 3 | expand

Commit Message

Lucas De Marchi Aug. 17, 2019, 9:38 a.m. UTC
From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Re-use Gen11 context size for now.

[ Lucas: add HACK since this is a temporary patch that needs to be
  confirmed: we need to check BSpec 46255 and recompute ]

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_engine_cs.c | 1 +
 1 file changed, 1 insertion(+)

Comments

Chris Wilson Aug. 20, 2019, 10:36 a.m. UTC | #1
Quoting Lucas De Marchi (2019-08-17 10:38:48)
> From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> 
> Re-use Gen11 context size for now.
> 
> [ Lucas: add HACK since this is a temporary patch that needs to be
>   confirmed: we need to check BSpec 46255 and recompute ]

We can drop the HACK and just refer to this as a temporary patch. We
have selftests and runtime verification to catch if we under allocate,
so if our testing is clean, it's good enough for the time being.

> 
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
Mika Kuoppala Aug. 22, 2019, 1:42 p.m. UTC | #2
Chris Wilson <chris@chris-wilson.co.uk> writes:

> Quoting Lucas De Marchi (2019-08-17 10:38:48)
>> From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>> 
>> Re-use Gen11 context size for now.
>> 
>> [ Lucas: add HACK since this is a temporary patch that needs to be
>>   confirmed: we need to check BSpec 46255 and recompute ]
>
> We can drop the HACK and just refer to this as a temporary patch. We
> have selftests and runtime verification to catch if we under allocate,
> so if our testing is clean, it's good enough for the time being.

I think I had a script somewhere which can calculate the
context size from bspec (Cut paste). No promises tho.

Howabout making a selftest to figure out the context state size?

-Mika

>
>> 
>> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> Acked-by: Chris Wilson <chris@chris-wilson.co.uk>
> -Chris
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Chris Wilson Aug. 22, 2019, 1:48 p.m. UTC | #3
Quoting Mika Kuoppala (2019-08-22 14:42:58)
> Chris Wilson <chris@chris-wilson.co.uk> writes:
> 
> > Quoting Lucas De Marchi (2019-08-17 10:38:48)
> >> From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> >> 
> >> Re-use Gen11 context size for now.
> >> 
> >> [ Lucas: add HACK since this is a temporary patch that needs to be
> >>   confirmed: we need to check BSpec 46255 and recompute ]
> >
> > We can drop the HACK and just refer to this as a temporary patch. We
> > have selftests and runtime verification to catch if we under allocate,
> > so if our testing is clean, it's good enough for the time being.
> 
> I think I had a script somewhere which can calculate the
> context size from bspec (Cut paste). No promises tho.
> 
> Howabout making a selftest to figure out the context state size?

For fun, we expect the context size to be variable dependent on
workload. I thought a single selftest would do the trick, but had to
settle for runtime checking just in case we hit a corner case we didn't
account for.
-Chris
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index ba457c1c7dc0..82630db0394b 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -164,6 +164,7 @@  u32 intel_engine_context_size(struct drm_i915_private *dev_priv, u8 class)
 		default:
 			MISSING_CASE(INTEL_GEN(dev_priv));
 			return DEFAULT_LR_CONTEXT_RENDER_SIZE;
+		case 12:
 		case 11:
 			return GEN11_LR_CONTEXT_RENDER_SIZE;
 		case 10: