Message ID | 20191223173244.30742-3-lucas.demarchi@intel.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | Prefer acronym for prefixes | expand |
On Mon, Dec 23, 2019 at 09:32:36AM -0800, Lucas De Marchi wrote: > We are currently using a mix of platform name and acronym to name the > functions. Let's prefer the acronym as it should be clear what platform > it's about and it's shorter, so it doesn't go over 80 columns in a few > cases. This converts pineview to pnv where appropriate. Do you also want to convert watermark stuff in intel_pm.c like pineview_display_wm, PINEVIEW_DISPLAY_FIFO, PINEVIEW_MAX_WM, etc.? Matt > > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> > Acked-by: Jani Nikula <jani.nikula@linux.intel.com> > Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/display/intel_display.c | 8 ++++---- > drivers/gpu/drm/i915/intel_pm.c | 4 ++-- > 2 files changed, 6 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index 1860da0a493e..5d43024f35aa 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -369,7 +369,7 @@ static const struct intel_limit intel_limits_g4x_dual_channel_lvds = { > }, > }; > > -static const struct intel_limit intel_limits_pineview_sdvo = { > +static const struct intel_limit pnv_limits_sdvo = { > .dot = { .min = 20000, .max = 400000}, > .vco = { .min = 1700000, .max = 3500000 }, > /* Pineview's Ncounter is a ring counter */ > @@ -384,7 +384,7 @@ static const struct intel_limit intel_limits_pineview_sdvo = { > .p2_slow = 10, .p2_fast = 5 }, > }; > > -static const struct intel_limit intel_limits_pineview_lvds = { > +static const struct intel_limit pnv_limits_lvds = { > .dot = { .min = 20000, .max = 400000 }, > .vco = { .min = 1700000, .max = 3500000 }, > .n = { .min = 3, .max = 6 }, > @@ -8795,9 +8795,9 @@ static int pnv_crtc_compute_clock(struct intel_crtc *crtc, > DRM_DEBUG_KMS("using SSC reference clock of %d kHz\n", refclk); > } > > - limit = &intel_limits_pineview_lvds; > + limit = &pnv_limits_lvds; > } else { > - limit = &intel_limits_pineview_sdvo; > + limit = &pnv_limits_sdvo; > } > > if (!crtc_state->clock_set && > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 31ec82337e4f..eab3b029e98a 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -140,7 +140,7 @@ static void glk_init_clock_gating(struct drm_i915_private *dev_priv) > > } > > -static void i915_pineview_get_mem_freq(struct drm_i915_private *dev_priv) > +static void pnv_get_mem_freq(struct drm_i915_private *dev_priv) > { > u32 tmp; > > @@ -7180,7 +7180,7 @@ void intel_init_pm(struct drm_i915_private *dev_priv) > { > /* For cxsr */ > if (IS_PINEVIEW(dev_priv)) > - i915_pineview_get_mem_freq(dev_priv); > + pnv_get_mem_freq(dev_priv); > else if (IS_GEN(dev_priv, 5)) > i915_ironlake_get_mem_freq(dev_priv); > > -- > 2.24.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
On Mon, Dec 23, 2019 at 02:58:31PM -0800, Matt Roper wrote: >On Mon, Dec 23, 2019 at 09:32:36AM -0800, Lucas De Marchi wrote: >> We are currently using a mix of platform name and acronym to name the >> functions. Let's prefer the acronym as it should be clear what platform >> it's about and it's shorter, so it doesn't go over 80 columns in a few >> cases. This converts pineview to pnv where appropriate. > >Do you also want to convert watermark stuff in intel_pm.c like >pineview_display_wm, PINEVIEW_DISPLAY_FIFO, PINEVIEW_MAX_WM, etc.? pineview_display_wm, yes. I missed that. I tried to avoid the constants and IS_<PLATFORM> macros as it would make it too ugly to review. Those can be done on top. Thanks Lucas De Marchi > > >Matt > >> >> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> >> Acked-by: Jani Nikula <jani.nikula@linux.intel.com> >> Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com> >> --- >> drivers/gpu/drm/i915/display/intel_display.c | 8 ++++---- >> drivers/gpu/drm/i915/intel_pm.c | 4 ++-- >> 2 files changed, 6 insertions(+), 6 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c >> index 1860da0a493e..5d43024f35aa 100644 >> --- a/drivers/gpu/drm/i915/display/intel_display.c >> +++ b/drivers/gpu/drm/i915/display/intel_display.c >> @@ -369,7 +369,7 @@ static const struct intel_limit intel_limits_g4x_dual_channel_lvds = { >> }, >> }; >> >> -static const struct intel_limit intel_limits_pineview_sdvo = { >> +static const struct intel_limit pnv_limits_sdvo = { >> .dot = { .min = 20000, .max = 400000}, >> .vco = { .min = 1700000, .max = 3500000 }, >> /* Pineview's Ncounter is a ring counter */ >> @@ -384,7 +384,7 @@ static const struct intel_limit intel_limits_pineview_sdvo = { >> .p2_slow = 10, .p2_fast = 5 }, >> }; >> >> -static const struct intel_limit intel_limits_pineview_lvds = { >> +static const struct intel_limit pnv_limits_lvds = { >> .dot = { .min = 20000, .max = 400000 }, >> .vco = { .min = 1700000, .max = 3500000 }, >> .n = { .min = 3, .max = 6 }, >> @@ -8795,9 +8795,9 @@ static int pnv_crtc_compute_clock(struct intel_crtc *crtc, >> DRM_DEBUG_KMS("using SSC reference clock of %d kHz\n", refclk); >> } >> >> - limit = &intel_limits_pineview_lvds; >> + limit = &pnv_limits_lvds; >> } else { >> - limit = &intel_limits_pineview_sdvo; >> + limit = &pnv_limits_sdvo; >> } >> >> if (!crtc_state->clock_set && >> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c >> index 31ec82337e4f..eab3b029e98a 100644 >> --- a/drivers/gpu/drm/i915/intel_pm.c >> +++ b/drivers/gpu/drm/i915/intel_pm.c >> @@ -140,7 +140,7 @@ static void glk_init_clock_gating(struct drm_i915_private *dev_priv) >> >> } >> >> -static void i915_pineview_get_mem_freq(struct drm_i915_private *dev_priv) >> +static void pnv_get_mem_freq(struct drm_i915_private *dev_priv) >> { >> u32 tmp; >> >> @@ -7180,7 +7180,7 @@ void intel_init_pm(struct drm_i915_private *dev_priv) >> { >> /* For cxsr */ >> if (IS_PINEVIEW(dev_priv)) >> - i915_pineview_get_mem_freq(dev_priv); >> + pnv_get_mem_freq(dev_priv); >> else if (IS_GEN(dev_priv, 5)) >> i915_ironlake_get_mem_freq(dev_priv); >> >> -- >> 2.24.0 >> >> _______________________________________________ >> Intel-gfx mailing list >> Intel-gfx@lists.freedesktop.org >> https://lists.freedesktop.org/mailman/listinfo/intel-gfx > >-- >Matt Roper >Graphics Software Engineer >VTT-OSGC Platform Enablement >Intel Corporation >(916) 356-2795
On Mon, Dec 23, 2019 at 03:20:57PM -0800, Lucas De Marchi wrote: > On Mon, Dec 23, 2019 at 02:58:31PM -0800, Matt Roper wrote: > > On Mon, Dec 23, 2019 at 09:32:36AM -0800, Lucas De Marchi wrote: > > > We are currently using a mix of platform name and acronym to name the > > > functions. Let's prefer the acronym as it should be clear what platform > > > it's about and it's shorter, so it doesn't go over 80 columns in a few > > > cases. This converts pineview to pnv where appropriate. > > > > Do you also want to convert watermark stuff in intel_pm.c like > > pineview_display_wm, PINEVIEW_DISPLAY_FIFO, PINEVIEW_MAX_WM, etc.? > > pineview_display_wm, yes. I missed that. > > I tried to avoid the constants and IS_<PLATFORM> macros as it would make > it too ugly to review. Those can be done on top. Okay. There's also: pineview_display_hplloff_wm pineview_cursor_wm pineview_cursor_hplloff_wm pineview_update_wm too. Matt > > Thanks > Lucas De Marchi > > > > > > > Matt > > > > > > > > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> > > > Acked-by: Jani Nikula <jani.nikula@linux.intel.com> > > > Acked-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > > > --- > > > drivers/gpu/drm/i915/display/intel_display.c | 8 ++++---- > > > drivers/gpu/drm/i915/intel_pm.c | 4 ++-- > > > 2 files changed, 6 insertions(+), 6 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > > > index 1860da0a493e..5d43024f35aa 100644 > > > --- a/drivers/gpu/drm/i915/display/intel_display.c > > > +++ b/drivers/gpu/drm/i915/display/intel_display.c > > > @@ -369,7 +369,7 @@ static const struct intel_limit intel_limits_g4x_dual_channel_lvds = { > > > }, > > > }; > > > > > > -static const struct intel_limit intel_limits_pineview_sdvo = { > > > +static const struct intel_limit pnv_limits_sdvo = { > > > .dot = { .min = 20000, .max = 400000}, > > > .vco = { .min = 1700000, .max = 3500000 }, > > > /* Pineview's Ncounter is a ring counter */ > > > @@ -384,7 +384,7 @@ static const struct intel_limit intel_limits_pineview_sdvo = { > > > .p2_slow = 10, .p2_fast = 5 }, > > > }; > > > > > > -static const struct intel_limit intel_limits_pineview_lvds = { > > > +static const struct intel_limit pnv_limits_lvds = { > > > .dot = { .min = 20000, .max = 400000 }, > > > .vco = { .min = 1700000, .max = 3500000 }, > > > .n = { .min = 3, .max = 6 }, > > > @@ -8795,9 +8795,9 @@ static int pnv_crtc_compute_clock(struct intel_crtc *crtc, > > > DRM_DEBUG_KMS("using SSC reference clock of %d kHz\n", refclk); > > > } > > > > > > - limit = &intel_limits_pineview_lvds; > > > + limit = &pnv_limits_lvds; > > > } else { > > > - limit = &intel_limits_pineview_sdvo; > > > + limit = &pnv_limits_sdvo; > > > } > > > > > > if (!crtc_state->clock_set && > > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > > > index 31ec82337e4f..eab3b029e98a 100644 > > > --- a/drivers/gpu/drm/i915/intel_pm.c > > > +++ b/drivers/gpu/drm/i915/intel_pm.c > > > @@ -140,7 +140,7 @@ static void glk_init_clock_gating(struct drm_i915_private *dev_priv) > > > > > > } > > > > > > -static void i915_pineview_get_mem_freq(struct drm_i915_private *dev_priv) > > > +static void pnv_get_mem_freq(struct drm_i915_private *dev_priv) > > > { > > > u32 tmp; > > > > > > @@ -7180,7 +7180,7 @@ void intel_init_pm(struct drm_i915_private *dev_priv) > > > { > > > /* For cxsr */ > > > if (IS_PINEVIEW(dev_priv)) > > > - i915_pineview_get_mem_freq(dev_priv); > > > + pnv_get_mem_freq(dev_priv); > > > else if (IS_GEN(dev_priv, 5)) > > > i915_ironlake_get_mem_freq(dev_priv); > > > > > > -- > > > 2.24.0 > > > > > > _______________________________________________ > > > Intel-gfx mailing list > > > Intel-gfx@lists.freedesktop.org > > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx > > > > -- > > Matt Roper > > Graphics Software Engineer > > VTT-OSGC Platform Enablement > > Intel Corporation > > (916) 356-2795
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 1860da0a493e..5d43024f35aa 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -369,7 +369,7 @@ static const struct intel_limit intel_limits_g4x_dual_channel_lvds = { }, }; -static const struct intel_limit intel_limits_pineview_sdvo = { +static const struct intel_limit pnv_limits_sdvo = { .dot = { .min = 20000, .max = 400000}, .vco = { .min = 1700000, .max = 3500000 }, /* Pineview's Ncounter is a ring counter */ @@ -384,7 +384,7 @@ static const struct intel_limit intel_limits_pineview_sdvo = { .p2_slow = 10, .p2_fast = 5 }, }; -static const struct intel_limit intel_limits_pineview_lvds = { +static const struct intel_limit pnv_limits_lvds = { .dot = { .min = 20000, .max = 400000 }, .vco = { .min = 1700000, .max = 3500000 }, .n = { .min = 3, .max = 6 }, @@ -8795,9 +8795,9 @@ static int pnv_crtc_compute_clock(struct intel_crtc *crtc, DRM_DEBUG_KMS("using SSC reference clock of %d kHz\n", refclk); } - limit = &intel_limits_pineview_lvds; + limit = &pnv_limits_lvds; } else { - limit = &intel_limits_pineview_sdvo; + limit = &pnv_limits_sdvo; } if (!crtc_state->clock_set && diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 31ec82337e4f..eab3b029e98a 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -140,7 +140,7 @@ static void glk_init_clock_gating(struct drm_i915_private *dev_priv) } -static void i915_pineview_get_mem_freq(struct drm_i915_private *dev_priv) +static void pnv_get_mem_freq(struct drm_i915_private *dev_priv) { u32 tmp; @@ -7180,7 +7180,7 @@ void intel_init_pm(struct drm_i915_private *dev_priv) { /* For cxsr */ if (IS_PINEVIEW(dev_priv)) - i915_pineview_get_mem_freq(dev_priv); + pnv_get_mem_freq(dev_priv); else if (IS_GEN(dev_priv, 5)) i915_ironlake_get_mem_freq(dev_priv);