diff mbox series

[2/3] drm/i915: Do drm_mode_config_reset() after HPD init

Message ID 20201006185809.4655-2-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series [1/3] drm/i915: Reorder hpd init vs. display resume | expand

Commit Message

Ville Syrjälä Oct. 6, 2020, 6:58 p.m. UTC
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

LSPCON requires HPD detection logic to be enabled when we call
its .reset() hook during resume, to check the live state of the
pin. To that end let's reorder the resume sequence such that
we do HPD init before the encoder reset.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.c | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

Comments

Imre Deak Oct. 12, 2020, 8:16 p.m. UTC | #1
On Tue, Oct 06, 2020 at 09:58:08PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> LSPCON requires HPD detection logic to be enabled when we call
> its .reset() hook during resume, to check the live state of the
> pin. To that end let's reorder the resume sequence such that
> we do HPD init before the encoder reset.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.c | 7 +++----
>  1 file changed, 3 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index b2a050d916e3..66ddd4161885 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -1213,21 +1213,20 @@ static int i915_drm_resume(struct drm_device *dev)
>  	 * GPU will hang. i915_gem_init_hw() will initiate batches to
>  	 * update/restore the context.
>  	 *
> -	 * drm_mode_config_reset() needs AUX interrupts.
> -	 *
>  	 * Modeset enabling in intel_modeset_init_hw() also needs working
>  	 * interrupts.
>  	 */
>  	intel_runtime_pm_enable_interrupts(dev_priv);
>  
> -	drm_mode_config_reset(dev);
> -
>  	i915_gem_resume(dev_priv);
>  
>  	intel_modeset_init_hw(dev_priv);
>  	intel_init_clock_gating(dev_priv);
>  	intel_hpd_init(dev_priv);
>  
> +	/* May need AUX interrupts and HPD detection enabled */
> +	drm_mode_config_reset(dev);

lspcon_resume() could be called both by the above and during connector
detection. Delaying hotplug detection until after intel_display_resume()
would be the ideal solution, but until that we could avoid this race by
taking connection_mutex.

> +
>  	/* MST sideband requires HPD interrupts enabled */
>  	intel_dp_mst_resume(dev_priv);
>  	intel_display_resume(dev);
> -- 
> 2.26.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Imre Deak Oct. 19, 2020, 3:39 p.m. UTC | #2
On Tue, Oct 06, 2020 at 09:58:08PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> LSPCON requires HPD detection logic to be enabled when we call
> its .reset() hook during resume, to check the live state of the
> pin. To that end let's reorder the resume sequence such that
> we do HPD init before the encoder reset.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Imre Deak <imre.deak@intel.com>

> ---
>  drivers/gpu/drm/i915/i915_drv.c | 7 +++----
>  1 file changed, 3 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index b2a050d916e3..66ddd4161885 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -1213,21 +1213,20 @@ static int i915_drm_resume(struct drm_device *dev)
>  	 * GPU will hang. i915_gem_init_hw() will initiate batches to
>  	 * update/restore the context.
>  	 *
> -	 * drm_mode_config_reset() needs AUX interrupts.
> -	 *
>  	 * Modeset enabling in intel_modeset_init_hw() also needs working
>  	 * interrupts.
>  	 */
>  	intel_runtime_pm_enable_interrupts(dev_priv);
>  
> -	drm_mode_config_reset(dev);
> -
>  	i915_gem_resume(dev_priv);
>  
>  	intel_modeset_init_hw(dev_priv);
>  	intel_init_clock_gating(dev_priv);
>  	intel_hpd_init(dev_priv);
>  
> +	/* May need AUX interrupts and HPD detection enabled */
> +	drm_mode_config_reset(dev);
> +
>  	/* MST sideband requires HPD interrupts enabled */
>  	intel_dp_mst_resume(dev_priv);
>  	intel_display_resume(dev);
> -- 
> 2.26.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Ville Syrjälä Oct. 19, 2020, 3:58 p.m. UTC | #3
On Mon, Oct 19, 2020 at 06:39:59PM +0300, Imre Deak wrote:
> On Tue, Oct 06, 2020 at 09:58:08PM +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > LSPCON requires HPD detection logic to be enabled when we call
> > its .reset() hook during resume, to check the live state of the
> > pin. To that end let's reorder the resume sequence such that
> > we do HPD init before the encoder reset.
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Reviewed-by: Imre Deak <imre.deak@intel.com>

I think I'll just drop this patch entirely. AFAICS no longer needed
once the lspcon resume is moved out of .reset().

> 
> > ---
> >  drivers/gpu/drm/i915/i915_drv.c | 7 +++----
> >  1 file changed, 3 insertions(+), 4 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> > index b2a050d916e3..66ddd4161885 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.c
> > +++ b/drivers/gpu/drm/i915/i915_drv.c
> > @@ -1213,21 +1213,20 @@ static int i915_drm_resume(struct drm_device *dev)
> >  	 * GPU will hang. i915_gem_init_hw() will initiate batches to
> >  	 * update/restore the context.
> >  	 *
> > -	 * drm_mode_config_reset() needs AUX interrupts.
> > -	 *
> >  	 * Modeset enabling in intel_modeset_init_hw() also needs working
> >  	 * interrupts.
> >  	 */
> >  	intel_runtime_pm_enable_interrupts(dev_priv);
> >  
> > -	drm_mode_config_reset(dev);
> > -
> >  	i915_gem_resume(dev_priv);
> >  
> >  	intel_modeset_init_hw(dev_priv);
> >  	intel_init_clock_gating(dev_priv);
> >  	intel_hpd_init(dev_priv);
> >  
> > +	/* May need AUX interrupts and HPD detection enabled */
> > +	drm_mode_config_reset(dev);
> > +
> >  	/* MST sideband requires HPD interrupts enabled */
> >  	intel_dp_mst_resume(dev_priv);
> >  	intel_display_resume(dev);
> > -- 
> > 2.26.2
> > 
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index b2a050d916e3..66ddd4161885 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1213,21 +1213,20 @@  static int i915_drm_resume(struct drm_device *dev)
 	 * GPU will hang. i915_gem_init_hw() will initiate batches to
 	 * update/restore the context.
 	 *
-	 * drm_mode_config_reset() needs AUX interrupts.
-	 *
 	 * Modeset enabling in intel_modeset_init_hw() also needs working
 	 * interrupts.
 	 */
 	intel_runtime_pm_enable_interrupts(dev_priv);
 
-	drm_mode_config_reset(dev);
-
 	i915_gem_resume(dev_priv);
 
 	intel_modeset_init_hw(dev_priv);
 	intel_init_clock_gating(dev_priv);
 	intel_hpd_init(dev_priv);
 
+	/* May need AUX interrupts and HPD detection enabled */
+	drm_mode_config_reset(dev);
+
 	/* MST sideband requires HPD interrupts enabled */
 	intel_dp_mst_resume(dev_priv);
 	intel_display_resume(dev);