diff mbox series

drm/i915: Fix error handling during DPRX link training

Message ID 20201027133600.3656665-1-imre.deak@intel.com
State New, archived
Headers show
Series drm/i915: Fix error handling during DPRX link training | expand

Commit Message

Imre Deak Oct. 27, 2020, 1:36 p.m. UTC
Make sure to propagate the error result from the DPRX link training
phase. The lack of this broke the link training fall-back logic if the
link training failed during the DPRX phase.

Fixes: b30edfd8d0b4 ("drm/i915: Switch to LTTPR non-transparent mode link training")
References: https://gitlab.freedesktop.org/drm/intel/-/issues/1378
Reported-by: Jason Andryuk <jandryuk@gmail.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp_link_training.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Jason Andryuk Oct. 27, 2020, 2:02 p.m. UTC | #1
On Tue, Oct 27, 2020 at 9:36 AM Imre Deak <imre.deak@intel.com> wrote:
>
> Make sure to propagate the error result from the DPRX link training
> phase. The lack of this broke the link training fall-back logic if the
> link training failed during the DPRX phase.
>
> Fixes: b30edfd8d0b4 ("drm/i915: Switch to LTTPR non-transparent mode link training")
> References: https://gitlab.freedesktop.org/drm/intel/-/issues/1378
> Reported-by: Jason Andryuk <jandryuk@gmail.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>

Reviewed-by: Jason Andryuk <jandryuk@gmail.com>

I haven't tested, but I assume this will cause my 7200 to fail link
training (channel equalization) and cause the flashing display.  Any
suggestions there?  Would a quirk like
https://lore.kernel.org/lkml/20201023124804.11457-1-jandryuk@gmail.com/
be acceptable?

Regards,
Jason
Imre Deak Oct. 28, 2020, 8:18 p.m. UTC | #2
On Tue, Oct 27, 2020 at 10:02:45AM -0400, Jason Andryuk wrote:
> On Tue, Oct 27, 2020 at 9:36 AM Imre Deak <imre.deak@intel.com> wrote:
> >
> > Make sure to propagate the error result from the DPRX link training
> > phase. The lack of this broke the link training fall-back logic if the
> > link training failed during the DPRX phase.
> >
> > Fixes: b30edfd8d0b4 ("drm/i915: Switch to LTTPR non-transparent mode link training")
> > References: https://gitlab.freedesktop.org/drm/intel/-/issues/1378
> > Reported-by: Jason Andryuk <jandryuk@gmail.com>
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Signed-off-by: Imre Deak <imre.deak@intel.com>
> 
> Reviewed-by: Jason Andryuk <jandryuk@gmail.com>

Thanks.

> I haven't tested, but I assume this will cause my 7200 to fail link
> training (channel equalization) and cause the flashing display.  Any
> suggestions there?  Would a quirk like
> https://lore.kernel.org/lkml/20201023124804.11457-1-jandryuk@gmail.com/
> be acceptable?

I'd like to try finding the root cause, if you could provide some more
logs on the gitlab ticket (will follow-up there).

> 
> Regards,
> Jason
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
index 91d3979902d0..632d0a7d886d 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c
@@ -768,7 +768,7 @@  intel_dp_link_train_all_phys(struct intel_dp *intel_dp,
 	}
 
 	if (ret)
-		intel_dp_link_train_phy(intel_dp, crtc_state, DP_PHY_DPRX);
+		ret = intel_dp_link_train_phy(intel_dp, crtc_state, DP_PHY_DPRX);
 
 	if (intel_dp->set_idle_link_train)
 		intel_dp->set_idle_link_train(intel_dp, crtc_state);