diff mbox series

[CI,v5,07/18] drm/i915/display/dp: Do not enable PSR if VRR is enabled

Message ID 20210122232647.22688-7-manasi.d.navare@intel.com (mailing list archive)
State New, archived
Headers show
Series [CI,v5,01/18] drm/i915/display/vrr: Create VRR file and add VRR capability check | expand

Commit Message

Navare, Manasi Jan. 22, 2021, 11:26 p.m. UTC
Even though our HW supports PSR + VRR, the available panels
do not work reliably with PSR and VRR together. So if user
requested VRR and is supported by HW enable that and do not
enable PSR in that case.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
 drivers/gpu/drm/i915/display/intel_psr.c | 7 +++++++
 1 file changed, 7 insertions(+)
diff mbox series


diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 6b1fb2b5afac..2c365b778f74 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -812,6 +812,13 @@  void intel_psr_compute_config(struct intel_dp *intel_dp,
 	int psr_setup_time;
+	/*
+	 * Current PSR panels dont work reliably with VRR enabled
+	 * So if VRR is enabled, do not enable PSR.
+	 */
+	if (crtc_state->vrr.enable)
+		return;
 	if (!CAN_PSR(dev_priv))