diff mbox series

[6/6] drm/i915: Extend icl_sanitize_encoder_pll_mapping() to all DDI platforms

Message ID 20210224144214.24803-7-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915: Move DDI clock readout to encoder->get_config() | expand

Commit Message

Ville Syrjälä Feb. 24, 2021, 2:42 p.m. UTC 
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Now that all the encoder clock stuff is uniformly abstracted
for all hsw+ platforms, let's extend icl_sanitize_encoder_pll_mapping()
to cover all of them.

Not sure there is a particular benefit in doing so, but less special
cases always makes me happy.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c     | 2 +-
 drivers/gpu/drm/i915/display/intel_ddi.h     | 2 +-
 drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
 3 files changed, 4 insertions(+), 4 deletions(-)

Comments

Kahola, Mika March 8, 2021, 1:17 p.m. UTC | #1 
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville
> Syrjala
> Sent: Wednesday, February 24, 2021 4:42 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 6/6] drm/i915: Extend
> icl_sanitize_encoder_pll_mapping() to all DDI platforms
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Now that all the encoder clock stuff is uniformly abstracted for all hsw+
> platforms, let's extend icl_sanitize_encoder_pll_mapping()
> to cover all of them.
> 
> Not sure there is a particular benefit in doing so, but less special cases always
> makes me happy.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Mika Kahola <mika.kahola@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c     | 2 +-
>  drivers/gpu/drm/i915/display/intel_ddi.h     | 2 +-
>  drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
>  3 files changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 7d477c4007c7..dd2203f87078 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -2134,7 +2134,7 @@ static void intel_ddi_disable_clock(struct
> intel_encoder *encoder)
>  		encoder->disable_clock(encoder);
>  }
> 
> -void icl_sanitize_encoder_pll_mapping(struct intel_encoder *encoder)
> +void intel_ddi_sanitize_encoder_pll_mapping(struct intel_encoder
> +*encoder)
>  {
>  	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
>  	u32 port_mask;
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.h
> b/drivers/gpu/drm/i915/display/intel_ddi.h
> index 99cebbe6b586..59c6b01d4199 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.h
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.h
> @@ -66,6 +66,6 @@ u32 ddi_signal_levels(struct intel_dp *intel_dp,  int
> intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder,
>  			       enum transcoder cpu_transcoder,
>  			       bool enable, u32 hdcp_mask);
> -void icl_sanitize_encoder_pll_mapping(struct intel_encoder *encoder);
> +void intel_ddi_sanitize_encoder_pll_mapping(struct intel_encoder
> +*encoder);
> 
>  #endif /* __INTEL_DDI_H__ */
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> index 8b5cb814b679..87db5331176b 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -13144,8 +13144,8 @@ static void intel_sanitize_encoder(struct
> intel_encoder *encoder)
>  	/* notify opregion of the sanitized encoder state */
>  	intel_opregion_notify_encoder(encoder, connector &&
> has_active_crtc);
> 
> -	if (INTEL_GEN(dev_priv) >= 11)
> -		icl_sanitize_encoder_pll_mapping(encoder);
> +	if (HAS_DDI(dev_priv))
> +		intel_ddi_sanitize_encoder_pll_mapping(encoder);
>  }
> 
>  /* FIXME read out full plane state for all planes */
> --
> 2.26.2
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 7d477c4007c7..dd2203f87078 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -2134,7 +2134,7 @@  static void intel_ddi_disable_clock(struct intel_encoder *encoder)
 		encoder->disable_clock(encoder);
 }
 
-void icl_sanitize_encoder_pll_mapping(struct intel_encoder *encoder)
+void intel_ddi_sanitize_encoder_pll_mapping(struct intel_encoder *encoder)
 {
 	struct drm_i915_private *i915 = to_i915(encoder->base.dev);
 	u32 port_mask;
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.h b/drivers/gpu/drm/i915/display/intel_ddi.h
index 99cebbe6b586..59c6b01d4199 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.h
+++ b/drivers/gpu/drm/i915/display/intel_ddi.h
@@ -66,6 +66,6 @@  u32 ddi_signal_levels(struct intel_dp *intel_dp,
 int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder,
 			       enum transcoder cpu_transcoder,
 			       bool enable, u32 hdcp_mask);
-void icl_sanitize_encoder_pll_mapping(struct intel_encoder *encoder);
+void intel_ddi_sanitize_encoder_pll_mapping(struct intel_encoder *encoder);
 
 #endif /* __INTEL_DDI_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 8b5cb814b679..87db5331176b 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -13144,8 +13144,8 @@  static void intel_sanitize_encoder(struct intel_encoder *encoder)
 	/* notify opregion of the sanitized encoder state */
 	intel_opregion_notify_encoder(encoder, connector && has_active_crtc);
 
-	if (INTEL_GEN(dev_priv) >= 11)
-		icl_sanitize_encoder_pll_mapping(encoder);
+	if (HAS_DDI(dev_priv))
+		intel_ddi_sanitize_encoder_pll_mapping(encoder);
 }
 
 /* FIXME read out full plane state for all planes */