diff mbox series

[v3,15/48] drm/i915/xelpd: Provide port/phy mapping for vbt

Message ID 20210508022820.780227-16-matthew.d.roper@intel.com (mailing list archive)
State New, archived
Headers show
Series Alder Lake-P Support | expand

Commit Message

Matt Roper May 8, 2021, 2:27 a.m. UTC
From: José Roberto de Souza <jose.souza@intel.com>

This will allow proper DDI initialization based on vbt information.

Cc: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bios.c | 18 +++++++++++++++++-
 1 file changed, 17 insertions(+), 1 deletion(-)

Comments

Anusha Srivatsa May 12, 2021, 7:21 p.m. UTC | #1
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Matt
> Roper
> Sent: Friday, May 7, 2021 7:28 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v3 15/48] drm/i915/xelpd: Provide port/phy
> mapping for vbt
> 
> From: José Roberto de Souza <jose.souza@intel.com>
> 
> This will allow proper DDI initialization based on vbt information.
> 
> Cc: Uma Shankar <uma.shankar@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>

Reviewed-by: Anusha Srivatsa <anusha.srivatsa@intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_bios.c | 18 +++++++++++++++++-
>  1 file changed, 17 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
> b/drivers/gpu/drm/i915/display/intel_bios.c
> index 027cc738a168..bf7f76e5241b 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -1743,8 +1743,24 @@ static enum port dvo_port_to_port(struct
> drm_i915_private *i915,
>  		[PORT_TC3] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
>  		[PORT_TC4] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
>  	};
> +	static const int xelpd_port_mapping[][3] = {
> +		[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
> +		[PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
> +		[PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
> +		[PORT_D_XELPD] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1
> },
> +		[PORT_E_XELPD] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1
> },
> +		[PORT_TC1] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
> +		[PORT_TC2] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
> +		[PORT_TC3] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
> +		[PORT_TC4] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
> +	};
> 
> -	if (IS_ALDERLAKE_S(i915))
> +	if (DISPLAY_VER(i915) == 13)
> +		return
> __dvo_port_to_port(ARRAY_SIZE(xelpd_port_mapping),
> +
> ARRAY_SIZE(xelpd_port_mapping[0]),
> +					  xelpd_port_mapping,
> +					  dvo_port);
> +	else if (IS_ALDERLAKE_S(i915))
>  		return
> __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping),
>  					  ARRAY_SIZE(adls_port_mapping[0]),
>  					  adls_port_mapping,
> --
> 2.25.4
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 027cc738a168..bf7f76e5241b 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1743,8 +1743,24 @@  static enum port dvo_port_to_port(struct drm_i915_private *i915,
 		[PORT_TC3] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
 		[PORT_TC4] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
 	};
+	static const int xelpd_port_mapping[][3] = {
+		[PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
+		[PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
+		[PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
+		[PORT_D_XELPD] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
+		[PORT_E_XELPD] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
+		[PORT_TC1] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
+		[PORT_TC2] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
+		[PORT_TC3] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
+		[PORT_TC4] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
+	};
 
-	if (IS_ALDERLAKE_S(i915))
+	if (DISPLAY_VER(i915) == 13)
+		return __dvo_port_to_port(ARRAY_SIZE(xelpd_port_mapping),
+					  ARRAY_SIZE(xelpd_port_mapping[0]),
+					  xelpd_port_mapping,
+					  dvo_port);
+	else if (IS_ALDERLAKE_S(i915))
 		return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping),
 					  ARRAY_SIZE(adls_port_mapping[0]),
 					  adls_port_mapping,