diff mbox series

[22/30] drm/i915: remove explicit CNL handling from intel_wopcm.c

Message ID 20210724001114.249295-23-lucas.demarchi@intel.com (mailing list archive)
State New, archived
Headers show
Series Remove CNL support | expand

Commit Message

Lucas De Marchi July 24, 2021, 12:11 a.m. UTC
Consider the new WOPCM size as starting in ICL rather than CNL since the
latter is being removed from the driver.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
 drivers/gpu/drm/i915/intel_wopcm.c | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

Comments

Rodrigo Vivi July 26, 2021, 10:57 a.m. UTC | #1
On Fri, Jul 23, 2021 at 05:11:06PM -0700, Lucas De Marchi wrote:
> Consider the new WOPCM size as starting in ICL rather than CNL since the
> latter is being removed from the driver.
> 
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

> ---
>  drivers/gpu/drm/i915/intel_wopcm.c | 10 +++++-----
>  1 file changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_wopcm.c b/drivers/gpu/drm/i915/intel_wopcm.c
> index 8309455f13ea..5e511bb891f9 100644
> --- a/drivers/gpu/drm/i915/intel_wopcm.c
> +++ b/drivers/gpu/drm/i915/intel_wopcm.c
> @@ -56,8 +56,8 @@
>  
>  /* 24KB at the end of WOPCM is reserved for RC6 CTX on BXT. */
>  #define BXT_WOPCM_RC6_CTX_RESERVED	(SZ_16K + SZ_8K)
> -/* 36KB WOPCM reserved at the end of WOPCM on CNL. */
> -#define CNL_WOPCM_HW_CTX_RESERVED	(SZ_32K + SZ_4K)
> +/* 36KB WOPCM reserved at the end of WOPCM on ICL. */
> +#define ICL_WOPCM_HW_CTX_RESERVED	(SZ_32K + SZ_4K)
>  
>  /* 128KB from GUC_WOPCM_RESERVED is reserved for FW on Gen9. */
>  #define GEN9_GUC_FW_RESERVED	SZ_128K
> @@ -93,8 +93,8 @@ static u32 context_reserved_size(struct drm_i915_private *i915)
>  {
>  	if (IS_GEN9_LP(i915))
>  		return BXT_WOPCM_RC6_CTX_RESERVED;
> -	else if (GRAPHICS_VER(i915) >= 10)
> -		return CNL_WOPCM_HW_CTX_RESERVED;
> +	else if (GRAPHICS_VER(i915) >= 11)
> +		return ICL_WOPCM_HW_CTX_RESERVED;
>  	else
>  		return 0;
>  }
> @@ -126,7 +126,7 @@ static bool gen9_check_huc_fw_fits(struct drm_i915_private *i915,
>  				   u32 guc_wopcm_size, u32 huc_fw_size)
>  {
>  	/*
> -	 * On Gen9 & CNL A0, hardware requires the total available GuC WOPCM
> +	 * On Gen9, hardware requires the total available GuC WOPCM
>  	 * size to be larger than or equal to HuC firmware size. Otherwise,
>  	 * firmware uploading would fail.
>  	 */
> -- 
> 2.31.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/intel_wopcm.c b/drivers/gpu/drm/i915/intel_wopcm.c
index 8309455f13ea..5e511bb891f9 100644
--- a/drivers/gpu/drm/i915/intel_wopcm.c
+++ b/drivers/gpu/drm/i915/intel_wopcm.c
@@ -56,8 +56,8 @@ 
 
 /* 24KB at the end of WOPCM is reserved for RC6 CTX on BXT. */
 #define BXT_WOPCM_RC6_CTX_RESERVED	(SZ_16K + SZ_8K)
-/* 36KB WOPCM reserved at the end of WOPCM on CNL. */
-#define CNL_WOPCM_HW_CTX_RESERVED	(SZ_32K + SZ_4K)
+/* 36KB WOPCM reserved at the end of WOPCM on ICL. */
+#define ICL_WOPCM_HW_CTX_RESERVED	(SZ_32K + SZ_4K)
 
 /* 128KB from GUC_WOPCM_RESERVED is reserved for FW on Gen9. */
 #define GEN9_GUC_FW_RESERVED	SZ_128K
@@ -93,8 +93,8 @@  static u32 context_reserved_size(struct drm_i915_private *i915)
 {
 	if (IS_GEN9_LP(i915))
 		return BXT_WOPCM_RC6_CTX_RESERVED;
-	else if (GRAPHICS_VER(i915) >= 10)
-		return CNL_WOPCM_HW_CTX_RESERVED;
+	else if (GRAPHICS_VER(i915) >= 11)
+		return ICL_WOPCM_HW_CTX_RESERVED;
 	else
 		return 0;
 }
@@ -126,7 +126,7 @@  static bool gen9_check_huc_fw_fits(struct drm_i915_private *i915,
 				   u32 guc_wopcm_size, u32 huc_fw_size)
 {
 	/*
-	 * On Gen9 & CNL A0, hardware requires the total available GuC WOPCM
+	 * On Gen9, hardware requires the total available GuC WOPCM
 	 * size to be larger than or equal to HuC firmware size. Otherwise,
 	 * firmware uploading would fail.
 	 */