diff mbox series

[13/16] drm/i915: Use intel_de_rmw() for tgl dkl phy programming

Message ID 20211006204937.30774-14-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915: DP per-lane drive settings for icl+ | expand

Commit Message

Ville Syrjala Oct. 6, 2021, 8:49 p.m. UTC 
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Streamline the code by using intel_de_rmw().

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c | 36 +++++++++++-------------
 1 file changed, 16 insertions(+), 20 deletions(-)

Comments

Souza, Jose Oct. 29, 2021, 10:01 p.m. UTC | #1 
On Wed, 2021-10-06 at 23:49 +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Streamline the code by using intel_de_rmw().

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c | 36 +++++++++++-------------
>  1 file changed, 16 insertions(+), 20 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 85247744e9dd..3c1b289df2c0 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -1307,7 +1307,6 @@ static void tgl_dkl_phy_set_signal_levels(struct intel_encoder *encoder,
>  
>  	for (ln = 0; ln < 2; ln++) {
>  		int level;
> -		u32 val;
>  
>  		intel_de_write(dev_priv, HIP_INDEX_REG(tc_port),
>  			       HIP_INDEX_VAL(tc_port, ln));
> @@ -1316,29 +1315,26 @@ static void tgl_dkl_phy_set_signal_levels(struct intel_encoder *encoder,
>  
>  		level = intel_ddi_level(encoder, crtc_state, 2*ln+0);
>  
> -		val = intel_de_read(dev_priv, DKL_TX_DPCNTL0(tc_port));
> -		val &= ~(DKL_TX_PRESHOOT_COEFF_MASK |
> -			 DKL_TX_DE_EMPAHSIS_COEFF_MASK |
> -			 DKL_TX_VSWING_CONTROL_MASK);
> -		val |= DKL_TX_VSWING_CONTROL(trans->entries[level].dkl.vswing) |
> -			DKL_TX_DE_EMPHASIS_COEFF(trans->entries[level].dkl.de_emphasis) |
> -			DKL_TX_PRESHOOT_COEFF(trans->entries[level].dkl.preshoot);
> -		intel_de_write(dev_priv, DKL_TX_DPCNTL0(tc_port), val);
> +		intel_de_rmw(dev_priv, DKL_TX_DPCNTL0(tc_port),
> +			     DKL_TX_PRESHOOT_COEFF_MASK |
> +			     DKL_TX_DE_EMPAHSIS_COEFF_MASK |
> +			     DKL_TX_VSWING_CONTROL_MASK,
> +			     DKL_TX_VSWING_CONTROL(trans->entries[level].dkl.vswing) |
> +			     DKL_TX_DE_EMPHASIS_COEFF(trans->entries[level].dkl.de_emphasis) |
> +			     DKL_TX_PRESHOOT_COEFF(trans->entries[level].dkl.preshoot));
>  
>  		level = intel_ddi_level(encoder, crtc_state, 2*ln+1);
>  
> -		val = intel_de_read(dev_priv, DKL_TX_DPCNTL1(tc_port));
> -		val &= ~(DKL_TX_PRESHOOT_COEFF_MASK |
> -			 DKL_TX_DE_EMPAHSIS_COEFF_MASK |
> -			 DKL_TX_VSWING_CONTROL_MASK);
> -		val |= DKL_TX_VSWING_CONTROL(trans->entries[level].dkl.vswing) |
> -			DKL_TX_DE_EMPHASIS_COEFF(trans->entries[level].dkl.de_emphasis) |
> -			DKL_TX_PRESHOOT_COEFF(trans->entries[level].dkl.preshoot);
> -		intel_de_write(dev_priv, DKL_TX_DPCNTL1(tc_port), val);
> +		intel_de_rmw(dev_priv, DKL_TX_DPCNTL1(tc_port),
> +			     DKL_TX_PRESHOOT_COEFF_MASK |
> +			     DKL_TX_DE_EMPAHSIS_COEFF_MASK |
> +			     DKL_TX_VSWING_CONTROL_MASK,
> +			     DKL_TX_VSWING_CONTROL(trans->entries[level].dkl.vswing) |
> +			     DKL_TX_DE_EMPHASIS_COEFF(trans->entries[level].dkl.de_emphasis) |
> +			     DKL_TX_PRESHOOT_COEFF(trans->entries[level].dkl.preshoot));
>  
> -		val = intel_de_read(dev_priv, DKL_TX_DPCNTL2(tc_port));
> -		val &= ~DKL_TX_DP20BITMODE;
> -		intel_de_write(dev_priv, DKL_TX_DPCNTL2(tc_port), val);
> +		intel_de_rmw(dev_priv, DKL_TX_DPCNTL2(tc_port),
> +			     DKL_TX_DP20BITMODE, 0);
>  	}
>  }
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 85247744e9dd..3c1b289df2c0 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -1307,7 +1307,6 @@  static void tgl_dkl_phy_set_signal_levels(struct intel_encoder *encoder,
 
 	for (ln = 0; ln < 2; ln++) {
 		int level;
-		u32 val;
 
 		intel_de_write(dev_priv, HIP_INDEX_REG(tc_port),
 			       HIP_INDEX_VAL(tc_port, ln));
@@ -1316,29 +1315,26 @@  static void tgl_dkl_phy_set_signal_levels(struct intel_encoder *encoder,
 
 		level = intel_ddi_level(encoder, crtc_state, 2*ln+0);
 
-		val = intel_de_read(dev_priv, DKL_TX_DPCNTL0(tc_port));
-		val &= ~(DKL_TX_PRESHOOT_COEFF_MASK |
-			 DKL_TX_DE_EMPAHSIS_COEFF_MASK |
-			 DKL_TX_VSWING_CONTROL_MASK);
-		val |= DKL_TX_VSWING_CONTROL(trans->entries[level].dkl.vswing) |
-			DKL_TX_DE_EMPHASIS_COEFF(trans->entries[level].dkl.de_emphasis) |
-			DKL_TX_PRESHOOT_COEFF(trans->entries[level].dkl.preshoot);
-		intel_de_write(dev_priv, DKL_TX_DPCNTL0(tc_port), val);
+		intel_de_rmw(dev_priv, DKL_TX_DPCNTL0(tc_port),
+			     DKL_TX_PRESHOOT_COEFF_MASK |
+			     DKL_TX_DE_EMPAHSIS_COEFF_MASK |
+			     DKL_TX_VSWING_CONTROL_MASK,
+			     DKL_TX_VSWING_CONTROL(trans->entries[level].dkl.vswing) |
+			     DKL_TX_DE_EMPHASIS_COEFF(trans->entries[level].dkl.de_emphasis) |
+			     DKL_TX_PRESHOOT_COEFF(trans->entries[level].dkl.preshoot));
 
 		level = intel_ddi_level(encoder, crtc_state, 2*ln+1);
 
-		val = intel_de_read(dev_priv, DKL_TX_DPCNTL1(tc_port));
-		val &= ~(DKL_TX_PRESHOOT_COEFF_MASK |
-			 DKL_TX_DE_EMPAHSIS_COEFF_MASK |
-			 DKL_TX_VSWING_CONTROL_MASK);
-		val |= DKL_TX_VSWING_CONTROL(trans->entries[level].dkl.vswing) |
-			DKL_TX_DE_EMPHASIS_COEFF(trans->entries[level].dkl.de_emphasis) |
-			DKL_TX_PRESHOOT_COEFF(trans->entries[level].dkl.preshoot);
-		intel_de_write(dev_priv, DKL_TX_DPCNTL1(tc_port), val);
+		intel_de_rmw(dev_priv, DKL_TX_DPCNTL1(tc_port),
+			     DKL_TX_PRESHOOT_COEFF_MASK |
+			     DKL_TX_DE_EMPAHSIS_COEFF_MASK |
+			     DKL_TX_VSWING_CONTROL_MASK,
+			     DKL_TX_VSWING_CONTROL(trans->entries[level].dkl.vswing) |
+			     DKL_TX_DE_EMPHASIS_COEFF(trans->entries[level].dkl.de_emphasis) |
+			     DKL_TX_PRESHOOT_COEFF(trans->entries[level].dkl.preshoot));
 
-		val = intel_de_read(dev_priv, DKL_TX_DPCNTL2(tc_port));
-		val &= ~DKL_TX_DP20BITMODE;
-		intel_de_write(dev_priv, DKL_TX_DPCNTL2(tc_port), val);
+		intel_de_rmw(dev_priv, DKL_TX_DPCNTL2(tc_port),
+			     DKL_TX_DP20BITMODE, 0);
 	}
 }