diff mbox series

[03/16] drm/i915/display: Disable DSB for DG2 and Alderlake-P

Message ID 20220507132850.10272-3-jose.souza@intel.com (mailing list archive)
State New, archived
Headers show
Series [01/16] drm/i915: Drop has_llc from device info | expand

Commit Message

José Roberto de Souza May 7, 2022, 1:28 p.m. UTC
Commit 99510e1afb48 ("drm/i915: Disable DSB usage for now") disabled
DSB for all display 12 platforms because it is not properly
programming gamma LUT but left display 13 platforms with it enabled
what I believe is not intentional.

kms_color@pipe-a-gamma test is still passing on TGL with DSB enabled
like reported in https://gitlab.freedesktop.org/drm/intel/-/issues/3916
and got the same behavior on Alderlake-P.

So here disabling DSB for all platforms and to avoid this mistake in
future platforms dropping the it from intel_device_info struct.

As a side effect of the of removal this flag, it will not be printed
in dmesg during driver load anymore and developers will have to rely
on to check the macro and compare with platform being used and IP
versions of it.

Fixes: 99510e1afb48 ("drm/i915: Disable DSB usage for now")
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          | 3 ++-
 drivers/gpu/drm/i915/i915_pci.c          | 4 +---
 drivers/gpu/drm/i915/intel_device_info.h | 1 -
 3 files changed, 3 insertions(+), 5 deletions(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 8d00d24e16dc5..4a93ea3bf4949 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -938,7 +938,8 @@  static inline struct intel_gt *to_gt(struct drm_i915_private *i915)
 
 #define INTEL_REVID(dev_priv)	(to_pci_dev((dev_priv)->drm.dev)->revision)
 
-#define HAS_DSB(dev_priv)	(INTEL_INFO(dev_priv)->display.has_dsb)
+/* FIXME: LUT load is broken with DSB */
+#define HAS_DSB(dev_priv)	(DISPLAY_VER(i915) >= 12 && 0)
 
 #define INTEL_DISPLAY_STEP(__i915) (RUNTIME_INFO(__i915)->step.display_step)
 #define INTEL_GRAPHICS_STEP(__i915) (RUNTIME_INFO(__i915)->step.graphics_step)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 8a7f7aad1a5d2..58653e5c24d35 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -848,8 +848,7 @@  static const struct intel_device_info jsl_info = {
 	}, \
 	TGL_CURSOR_OFFSETS, \
 	.has_global_mocs = 1, \
-	.has_pxp = 1, \
-	.display.has_dsb = 0 /* FIXME: LUT load is broken with DSB */
+	.has_pxp = 1
 
 static const struct intel_device_info tgl_info = {
 	GEN12_FEATURES,
@@ -922,7 +921,6 @@  static const struct intel_device_info adl_s_info = {
 	.dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) |		\
 		BIT(DBUF_S4),							\
 	.display.has_dmc = 1,							\
-	.display.has_dsb = 1,							\
 	.display.has_dsc = 1,							\
 	.display.fbc_mask = BIT(INTEL_FBC_A),					\
 	.display.has_fpga_dbg = 1,						\
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index f614f29267273..d4fb2af3b8be8 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -166,7 +166,6 @@  enum intel_ppgtt_type {
 	func(cursor_needs_physical); \
 	func(has_cdclk_crawl); \
 	func(has_dmc); \
-	func(has_dsb); \
 	func(has_dsc); \
 	func(has_fpga_dbg); \
 	func(has_gmch); \