diff mbox series

[v2,5/9] drm/i915: Add missing invalidate to g4x wm readout

Message ID 20220622155452.32587-6-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915: g4x/vlv/chv CxSR/wm fixes/cleanups | expand

Commit Message

Ville Syrjälä June 22, 2022, 3:54 p.m. UTC 
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Let's not forget to mark the unused watermark levels as invalid
after the readout. The vlv/chv codepath has this but the g4x
didn't for some reason.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 2 ++
 1 file changed, 2 insertions(+)

Comments

Stanislav Lisovskiy Sept. 21, 2022, 3:14 p.m. UTC | #1 
On Wed, Jun 22, 2022 at 06:54:48PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Let's not forget to mark the unused watermark levels as invalid
> after the readout. The vlv/chv codepath has this but the g4x
> didn't for some reason.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>

> ---
>  drivers/gpu/drm/i915/intel_pm.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 45ec00e2e3c4..734deb0bd867 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -6915,6 +6915,8 @@ void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv)
>  					     plane_id, USHRT_MAX);
>  		g4x_raw_fbc_wm_set(crtc_state, level, USHRT_MAX);
>  
> +		g4x_invalidate_wms(crtc, active, level);
> +
>  		crtc_state->wm.g4x.optimal = *active;
>  		crtc_state->wm.g4x.intermediate = *active;
>  
> -- 
> 2.35.1
>
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 45ec00e2e3c4..734deb0bd867 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6915,6 +6915,8 @@  void g4x_wm_get_hw_state(struct drm_i915_private *dev_priv)
 					     plane_id, USHRT_MAX);
 		g4x_raw_fbc_wm_set(crtc_state, level, USHRT_MAX);
 
+		g4x_invalidate_wms(crtc, active, level);
+
 		crtc_state->wm.g4x.optimal = *active;
 		crtc_state->wm.g4x.intermediate = *active;