| Message ID | 20221122120825.26338-9-ville.syrjala@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915/dvo: Further DVO fixes/cleanups | expand |
On Tue, 22 Nov 2022, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Replace the hand rolled RMW with intel_de_rmw() in the DVO > port enable/disable functions. Also switch to intel_de_posting_read() > for the posting read (though maybe it should be just be nuked...). > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> I've got an old series adding intel_de_write_post() and intel_de_rmw_post() that combine the write and the posting read. Wonder if I should resurrect that. *shrug*. Reviewed-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/display/intel_dvo.c | 11 +++++------ > 1 file changed, 5 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dvo.c b/drivers/gpu/drm/i915/display/intel_dvo.c > index a5c464c82e5c..c590a92205f0 100644 > --- a/drivers/gpu/drm/i915/display/intel_dvo.c > +++ b/drivers/gpu/drm/i915/display/intel_dvo.c > @@ -185,11 +185,11 @@ static void intel_disable_dvo(struct intel_atomic_state *state, > struct drm_i915_private *i915 = to_i915(encoder->base.dev); > struct intel_dvo *intel_dvo = enc_to_dvo(encoder); > enum port port = encoder->port; > - u32 temp = intel_de_read(i915, DVO(port)); > > intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false); > - intel_de_write(i915, DVO(port), temp & ~DVO_ENABLE); > - intel_de_read(i915, DVO(port)); > + > + intel_de_rmw(i915, DVO(port), DVO_ENABLE, 0); > + intel_de_posting_read(i915, DVO(port)); > } > > static void intel_enable_dvo(struct intel_atomic_state *state, > @@ -200,14 +200,13 @@ static void intel_enable_dvo(struct intel_atomic_state *state, > struct drm_i915_private *i915 = to_i915(encoder->base.dev); > struct intel_dvo *intel_dvo = enc_to_dvo(encoder); > enum port port = encoder->port; > - u32 temp = intel_de_read(i915, DVO(port)); > > intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, > &pipe_config->hw.mode, > &pipe_config->hw.adjusted_mode); > > - intel_de_write(i915, DVO(port), temp | DVO_ENABLE); > - intel_de_read(i915, DVO(port)); > + intel_de_rmw(i915, DVO(port), 0, DVO_ENABLE); > + intel_de_posting_read(i915, DVO(port)); > > intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true); > }
diff --git a/drivers/gpu/drm/i915/display/intel_dvo.c b/drivers/gpu/drm/i915/display/intel_dvo.c index a5c464c82e5c..c590a92205f0 100644 --- a/drivers/gpu/drm/i915/display/intel_dvo.c +++ b/drivers/gpu/drm/i915/display/intel_dvo.c @@ -185,11 +185,11 @@ static void intel_disable_dvo(struct intel_atomic_state *state, struct drm_i915_private *i915 = to_i915(encoder->base.dev); struct intel_dvo *intel_dvo = enc_to_dvo(encoder); enum port port = encoder->port; - u32 temp = intel_de_read(i915, DVO(port)); intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false); - intel_de_write(i915, DVO(port), temp & ~DVO_ENABLE); - intel_de_read(i915, DVO(port)); + + intel_de_rmw(i915, DVO(port), DVO_ENABLE, 0); + intel_de_posting_read(i915, DVO(port)); } static void intel_enable_dvo(struct intel_atomic_state *state, @@ -200,14 +200,13 @@ static void intel_enable_dvo(struct intel_atomic_state *state, struct drm_i915_private *i915 = to_i915(encoder->base.dev); struct intel_dvo *intel_dvo = enc_to_dvo(encoder); enum port port = encoder->port; - u32 temp = intel_de_read(i915, DVO(port)); intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, &pipe_config->hw.mode, &pipe_config->hw.adjusted_mode); - intel_de_write(i915, DVO(port), temp | DVO_ENABLE); - intel_de_read(i915, DVO(port)); + intel_de_rmw(i915, DVO(port), 0, DVO_ENABLE); + intel_de_posting_read(i915, DVO(port)); intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true); }