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[03/13] drm/i915: Define skl+ palette anti-collision bit

Message ID 20221123152638.20622-4-ville.syrjala@linux.intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915: Gamma/DSB prep work | expand

Commit Message

Ville Syrjälä Nov. 23, 2022, 3:26 p.m. UTC 
From: Ville Syrjälä <ville.syrjala@linux.intel.com>

I've been frobbing the palette anti-collision logic bit
while playing around with DSB. Not sure we'll have real
use for this but let's define the bit anyways so I don't
have to carry it around locally.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h | 1 +
 1 file changed, 1 insertion(+)

Comments

Shankar, Uma Dec. 7, 2022, 5:49 a.m. UTC | #1 
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville Syrjala
> Sent: Wednesday, November 23, 2022 8:56 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH 03/13] drm/i915: Define skl+ palette anti-collision bit
> 
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> I've been frobbing the palette anti-collision logic bit while playing around with DSB.
> Not sure we'll have real use for this but let's define the bit anyways so I don't have to
> carry it around locally.

Looks Good to me.
Reviewed-by: Uma Shankar <uma.shankar@intel.com>

> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_reg.h | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 52d289f55ce1..80ac50d80af4 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -5311,6 +5311,7 @@
>  #define GAMMA_MODE(pipe) _MMIO_PIPE(pipe, _GAMMA_MODE_A,
> _GAMMA_MODE_B)
>  #define  PRE_CSC_GAMMA_ENABLE			REG_BIT(31) /* icl+ */
>  #define  POST_CSC_GAMMA_ENABLE			REG_BIT(30) /* icl+ */
> +#define  PALETTE_ANTICOL_DISABLE		REG_BIT(15) /* skl+ */
>  #define  GAMMA_MODE_MODE_MASK			REG_GENMASK(1, 0)
>  #define  GAMMA_MODE_MODE_8BIT
> 	REG_FIELD_PREP(GAMMA_MODE_MODE_MASK, 0)
>  #define  GAMMA_MODE_MODE_10BIT
> 	REG_FIELD_PREP(GAMMA_MODE_MODE_MASK, 1)
> --
> 2.37.4
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 52d289f55ce1..80ac50d80af4 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5311,6 +5311,7 @@ 
 #define GAMMA_MODE(pipe) _MMIO_PIPE(pipe, _GAMMA_MODE_A, _GAMMA_MODE_B)
 #define  PRE_CSC_GAMMA_ENABLE			REG_BIT(31) /* icl+ */
 #define  POST_CSC_GAMMA_ENABLE			REG_BIT(30) /* icl+ */
+#define  PALETTE_ANTICOL_DISABLE		REG_BIT(15) /* skl+ */
 #define  GAMMA_MODE_MODE_MASK			REG_GENMASK(1, 0)
 #define  GAMMA_MODE_MODE_8BIT			REG_FIELD_PREP(GAMMA_MODE_MODE_MASK, 0)
 #define  GAMMA_MODE_MODE_10BIT			REG_FIELD_PREP(GAMMA_MODE_MODE_MASK, 1)