diff mbox series

[v2,1/2] drm/i915: Fix GEN8_MISCCPCTL

Message ID 20230206165410.3056073-1-lucas.demarchi@intel.com (mailing list archive)
State New, archived
Headers show
Series [v2,1/2] drm/i915: Fix GEN8_MISCCPCTL | expand

Commit Message

Lucas De Marchi Feb. 6, 2023, 4:54 p.m. UTC
Register 0x9424 is not replicated on any platform, so it shouldn't be
declared with REG_MCR(). Declaring it with _MMIO() is basically
duplicate of the GEN7 version, so just remove the GEN8 and change all
the callers to use the right functions.

Old versions of the gen8 bspec page used to contain a table with MCR
registers, apparently implying 0x9400 - 0x94ff registers were
replicated. However that table went away and there is no information
related to the ranges for gen8 anymore. Moreover the current behavior of
the driver wouldn't do anything special for 0x9424 since there is no
equivalent table in intel_gt_mcr.c: the driver would just fallback to
intel_uncore_{read,write}(). Therefore, do not care about the possible
special case for gen8 and just use the register as non-MCR for all the
platforms.

One place doing read + write is also converted to intel_uncore_rmw().

v2: Reword commit message adding the justification wrt gen8

Fixes: a9e69428b1b4 ("drm/i915: Define MCR registers explicitly")
Cc: Balasubramani Vivekanandan <balasubramani.vivekanandan@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Gustavo Sousa <gustavo.sousa@intel.com>
Cc: Matt Atwood <matthew.s.atwood@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_gt_regs.h     |  5 +----
 drivers/gpu/drm/i915/gt/intel_workarounds.c |  4 ++--
 drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c   |  5 ++---
 drivers/gpu/drm/i915/intel_pm.c             | 10 +++++-----
 4 files changed, 10 insertions(+), 14 deletions(-)

Comments

Lucas De Marchi Feb. 7, 2023, 7:05 p.m. UTC | #1
On Mon, Feb 06, 2023 at 08:04:29PM +0000, Patchwork wrote:
>== Series Details ==
>
>Series: series starting with [v2,1/2] drm/i915: Fix GEN8_MISCCPCTL
>URL   : https://patchwork.freedesktop.org/series/113713/
>State : failure
>
>== Summary ==
>
>CI Bug Log - changes from CI_DRM_12704 -> Patchwork_113713v1
>====================================================
>
>Summary
>-------
>
>  **FAILURE**
>
>  Serious unknown changes coming with Patchwork_113713v1 absolutely need to be
>  verified manually.
>
>  If you think the reported changes have nothing to do with the changes
>  introduced in Patchwork_113713v1, please notify your bug team to allow them
>  to document this new failure mode, which will reduce false positives in CI.
>
>  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113713v1/index.html
>
>Participating hosts (36 -> 34)
>------------------------------
>
>  Missing    (2): bat-atsm-1 fi-snb-2520m
>
>Possible new issues
>-------------------
>
>  Here are the unknown changes that may have been introduced in Patchwork_113713v1:
>
>### IGT changes ###
>
>#### Possible regressions ####
>
>  * igt@kms_flip@basic-flip-vs-modeset@b-dp1:
>    - fi-elk-e7500:       [PASS][1] -> [FAIL][2]
>   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12704/fi-elk-e7500/igt@kms_flip@basic-flip-vs-modeset@b-dp1.html
>   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113713v1/fi-elk-e7500/igt@kms_flip@basic-flip-vs-modeset@b-dp1.html

unrelated fail. There were no changes between v1 and v2 except for the
commit message in the first patch. v1 got full pass:
https://patchwork.freedesktop.org/series/113626/

Also, looking at 
https://intel-gfx-ci.01.org/tree/drm-tip/bat-all.html?testfilter=basic-flip-vs-modeset
It looks like this machine changed from DP to HDMI starting in
CI_DRM_12708?

Lucas De Marchi


>
>
>Known issues
>------------
>
>  Here are the changes found in Patchwork_113713v1 that come from known issues:
>
>### IGT changes ###
>
>#### Issues hit ####
>
>  * igt@kms_chamelium_hpd@common-hpd-after-suspend:
>    - bat-dg1-5:          NOTRUN -> [SKIP][3] ([i915#7828])
>   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113713v1/bat-dg1-5/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
>
>
>#### Possible fixes ####
>
>  * igt@i915_selftest@live@hangcheck:
>    - bat-dg1-5:          [ABORT][4] ([i915#4983]) -> [PASS][5]
>   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12704/bat-dg1-5/igt@i915_selftest@live@hangcheck.html
>   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113713v1/bat-dg1-5/igt@i915_selftest@live@hangcheck.html
>
>  * igt@i915_selftest@live@slpc:
>    - {bat-rpls-1}:       [DMESG-FAIL][6] ([i915#6367]) -> [PASS][7]
>   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12704/bat-rpls-1/igt@i915_selftest@live@slpc.html
>   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113713v1/bat-rpls-1/igt@i915_selftest@live@slpc.html
>
>  * igt@kms_busy@basic@modeset:
>    - fi-elk-e7500:       [FAIL][8] -> [PASS][9]
>   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12704/fi-elk-e7500/igt@kms_busy@basic@modeset.html
>   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113713v1/fi-elk-e7500/igt@kms_busy@basic@modeset.html
>
>
>  {name}: This element is suppressed. This means it is ignored when computing
>          the status of the difference (SUCCESS, WARNING, or FAILURE).
>
>  [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
>  [i915#6311]: https://gitlab.freedesktop.org/drm/intel/issues/6311
>  [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
>  [i915#7359]: https://gitlab.freedesktop.org/drm/intel/issues/7359
>  [i915#7699]: https://gitlab.freedesktop.org/drm/intel/issues/7699
>  [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
>
>
>Build changes
>-------------
>
>  * Linux: CI_DRM_12704 -> Patchwork_113713v1
>
>  CI-20190529: 20190529
>  CI_DRM_12704: 0f138ae07efe477bd51695d63b03394050bb6e07 @ git://anongit.freedesktop.org/gfx-ci/linux
>  IGT_7152: 790b81207a0a6705213ec5ea645bc5e223b2ce1d @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
>  Patchwork_113713v1: 0f138ae07efe477bd51695d63b03394050bb6e07 @ git://anongit.freedesktop.org/gfx-ci/linux
>
>
>### Linux commits
>
>204afd36a3d7 drm/i915: Remove unused/wrong INF_UNIT_LEVEL_CLKGATE
>80322c878d54 drm/i915: Fix GEN8_MISCCPCTL
>
>== Logs ==
>
>For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113713v1/index.html
Lucas De Marchi Feb. 9, 2023, 12:56 a.m. UTC | #2
On Tue, Feb 07, 2023 at 11:05:55AM -0800, Lucas De Marchi wrote:
>On Mon, Feb 06, 2023 at 08:04:29PM +0000, Patchwork wrote:
>>== Series Details ==
>>
>>Series: series starting with [v2,1/2] drm/i915: Fix GEN8_MISCCPCTL
>>URL   : https://patchwork.freedesktop.org/series/113713/
>>State : failure
>>
>>== Summary ==
>>
>>CI Bug Log - changes from CI_DRM_12704 -> Patchwork_113713v1
>>====================================================
>>
>>Summary
>>-------
>>
>> **FAILURE**
>>
>> Serious unknown changes coming with Patchwork_113713v1 absolutely need to be
>> verified manually.
>>
>> If you think the reported changes have nothing to do with the changes
>> introduced in Patchwork_113713v1, please notify your bug team to allow them
>> to document this new failure mode, which will reduce false positives in CI.
>>
>> External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113713v1/index.html
>>
>>Participating hosts (36 -> 34)
>>------------------------------
>>
>> Missing    (2): bat-atsm-1 fi-snb-2520m
>>
>>Possible new issues
>>-------------------
>>
>> Here are the unknown changes that may have been introduced in Patchwork_113713v1:
>>
>>### IGT changes ###
>>
>>#### Possible regressions ####
>>
>> * igt@kms_flip@basic-flip-vs-modeset@b-dp1:
>>   - fi-elk-e7500:       [PASS][1] -> [FAIL][2]
>>  [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12704/fi-elk-e7500/igt@kms_flip@basic-flip-vs-modeset@b-dp1.html
>>  [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113713v1/fi-elk-e7500/igt@kms_flip@basic-flip-vs-modeset@b-dp1.html
>
>unrelated fail. There were no changes between v1 and v2 except for the
>commit message in the first patch. v1 got full pass:
>https://patchwork.freedesktop.org/series/113626/


used these results as "it's safe enough to push" and applied.

Lucas De Marchi

>
>Also, looking at https://intel-gfx-ci.01.org/tree/drm-tip/bat-all.html?testfilter=basic-flip-vs-modeset
>It looks like this machine changed from DP to HDMI starting in
>CI_DRM_12708?
>
>Lucas De Marchi
>
>
>>
>>
>>Known issues
>>------------
>>
>> Here are the changes found in Patchwork_113713v1 that come from known issues:
>>
>>### IGT changes ###
>>
>>#### Issues hit ####
>>
>> * igt@kms_chamelium_hpd@common-hpd-after-suspend:
>>   - bat-dg1-5:          NOTRUN -> [SKIP][3] ([i915#7828])
>>  [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113713v1/bat-dg1-5/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
>>
>>
>>#### Possible fixes ####
>>
>> * igt@i915_selftest@live@hangcheck:
>>   - bat-dg1-5:          [ABORT][4] ([i915#4983]) -> [PASS][5]
>>  [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12704/bat-dg1-5/igt@i915_selftest@live@hangcheck.html
>>  [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113713v1/bat-dg1-5/igt@i915_selftest@live@hangcheck.html
>>
>> * igt@i915_selftest@live@slpc:
>>   - {bat-rpls-1}:       [DMESG-FAIL][6] ([i915#6367]) -> [PASS][7]
>>  [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12704/bat-rpls-1/igt@i915_selftest@live@slpc.html
>>  [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113713v1/bat-rpls-1/igt@i915_selftest@live@slpc.html
>>
>> * igt@kms_busy@basic@modeset:
>>   - fi-elk-e7500:       [FAIL][8] -> [PASS][9]
>>  [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12704/fi-elk-e7500/igt@kms_busy@basic@modeset.html
>>  [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113713v1/fi-elk-e7500/igt@kms_busy@basic@modeset.html
>>
>>
>> {name}: This element is suppressed. This means it is ignored when computing
>>         the status of the difference (SUCCESS, WARNING, or FAILURE).
>>
>> [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
>> [i915#6311]: https://gitlab.freedesktop.org/drm/intel/issues/6311
>> [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
>> [i915#7359]: https://gitlab.freedesktop.org/drm/intel/issues/7359
>> [i915#7699]: https://gitlab.freedesktop.org/drm/intel/issues/7699
>> [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
>>
>>
>>Build changes
>>-------------
>>
>> * Linux: CI_DRM_12704 -> Patchwork_113713v1
>>
>> CI-20190529: 20190529
>> CI_DRM_12704: 0f138ae07efe477bd51695d63b03394050bb6e07 @ git://anongit.freedesktop.org/gfx-ci/linux
>> IGT_7152: 790b81207a0a6705213ec5ea645bc5e223b2ce1d @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
>> Patchwork_113713v1: 0f138ae07efe477bd51695d63b03394050bb6e07 @ git://anongit.freedesktop.org/gfx-ci/linux
>>
>>
>>### Linux commits
>>
>>204afd36a3d7 drm/i915: Remove unused/wrong INF_UNIT_LEVEL_CLKGATE
>>80322c878d54 drm/i915: Fix GEN8_MISCCPCTL
>>
>>== Logs ==
>>
>>For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_113713v1/index.html
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
index 7fa18a3b3957..cc1539c7a6b6 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
@@ -686,10 +686,7 @@ 
 #define GEN6_RSTCTL				_MMIO(0x9420)
 
 #define GEN7_MISCCPCTL				_MMIO(0x9424)
-#define   GEN7_DOP_CLOCK_GATE_ENABLE		(1 << 0)
-
-#define GEN8_MISCCPCTL				MCR_REG(0x9424)
-#define   GEN8_DOP_CLOCK_GATE_ENABLE		REG_BIT(0)
+#define   GEN7_DOP_CLOCK_GATE_ENABLE		REG_BIT(0)
 #define   GEN12_DOP_CLOCK_GATE_RENDER_ENABLE	REG_BIT(1)
 #define   GEN8_DOP_CLOCK_GATE_CFCLK_ENABLE	(1 << 2)
 #define   GEN8_DOP_CLOCK_GATE_GUC_ENABLE	(1 << 4)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 29718d0595f4..cfc122c17e28 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1645,7 +1645,7 @@  dg2_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 	wa_mcr_write_or(wal, XEHP_SQCM, EN_32B_ACCESS);
 
 	/* Wa_14015795083 */
-	wa_mcr_write_clr(wal, GEN8_MISCCPCTL, GEN12_DOP_CLOCK_GATE_RENDER_ENABLE);
+	wa_write_clr(wal, GEN7_MISCCPCTL, GEN12_DOP_CLOCK_GATE_RENDER_ENABLE);
 
 	/* Wa_18018781329 */
 	wa_mcr_write_or(wal, RENDER_MOD_CTRL, FORCE_MISS_FTLB);
@@ -1664,7 +1664,7 @@  pvc_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
 	pvc_init_mcr(gt, wal);
 
 	/* Wa_14015795083 */
-	wa_mcr_write_clr(wal, GEN8_MISCCPCTL, GEN12_DOP_CLOCK_GATE_RENDER_ENABLE);
+	wa_write_clr(wal, GEN7_MISCCPCTL, GEN12_DOP_CLOCK_GATE_RENDER_ENABLE);
 
 	/* Wa_18018781329 */
 	wa_mcr_write_or(wal, RENDER_MOD_CTRL, FORCE_MISS_FTLB);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
index 3d2249bda368..69133420c78b 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fw.c
@@ -39,9 +39,8 @@  static void guc_prepare_xfer(struct intel_gt *gt)
 
 	if (GRAPHICS_VER(uncore->i915) == 9) {
 		/* DOP Clock Gating Enable for GuC clocks */
-		intel_gt_mcr_multicast_write(gt, GEN8_MISCCPCTL,
-					     GEN8_DOP_CLOCK_GATE_GUC_ENABLE |
-					     intel_gt_mcr_read_any(gt, GEN8_MISCCPCTL));
+		intel_uncore_rmw(uncore, GEN7_MISCCPCTL, 0,
+				 GEN8_DOP_CLOCK_GATE_GUC_ENABLE);
 
 		/* allows for 5us (in 10ns units) before GT can go to RC6 */
 		intel_uncore_write(uncore, GUC_ARAT_C6DIS, 0x1FF);
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index e0364c4141b8..798607959458 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4300,8 +4300,8 @@  static void gen8_set_l3sqc_credits(struct drm_i915_private *dev_priv,
 	u32 val;
 
 	/* WaTempDisableDOPClkGating:bdw */
-	misccpctl = intel_gt_mcr_multicast_rmw(to_gt(dev_priv), GEN8_MISCCPCTL,
-					       GEN8_DOP_CLOCK_GATE_ENABLE, 0);
+	misccpctl = intel_uncore_rmw(&dev_priv->uncore, GEN7_MISCCPCTL,
+				     GEN7_DOP_CLOCK_GATE_ENABLE, 0);
 
 	val = intel_gt_mcr_read_any(to_gt(dev_priv), GEN8_L3SQCREG1);
 	val &= ~L3_PRIO_CREDITS_MASK;
@@ -4315,7 +4315,7 @@  static void gen8_set_l3sqc_credits(struct drm_i915_private *dev_priv,
 	 */
 	intel_gt_mcr_read_any(to_gt(dev_priv), GEN8_L3SQCREG1);
 	udelay(1);
-	intel_gt_mcr_multicast_write(to_gt(dev_priv), GEN8_MISCCPCTL, misccpctl);
+	intel_uncore_write(&dev_priv->uncore, GEN7_MISCCPCTL, misccpctl);
 }
 
 static void icl_init_clock_gating(struct drm_i915_private *dev_priv)
@@ -4453,8 +4453,8 @@  static void skl_init_clock_gating(struct drm_i915_private *dev_priv)
 	gen9_init_clock_gating(dev_priv);
 
 	/* WaDisableDopClockGating:skl */
-	intel_gt_mcr_multicast_rmw(to_gt(dev_priv), GEN8_MISCCPCTL,
-				   GEN8_DOP_CLOCK_GATE_ENABLE, 0);
+	intel_uncore_rmw(&dev_priv->uncore, GEN7_MISCCPCTL,
+			 GEN7_DOP_CLOCK_GATE_ENABLE, 0);
 
 	/* WAC6entrylatency:skl */
 	intel_uncore_rmw(&dev_priv->uncore, FBC_LLC_READ_CTRL, 0, FBC_LLC_FULLY_OPEN);