| Message ID | 20230224211221.1557268-1-lucas.demarchi@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: Move MCR_REG define to i915_reg_defs.h | expand |
On Fri, Feb 24, 2023 at 01:12:21PM -0800, Lucas De Marchi wrote: > Define MCR_REG() in the same header where i915_mcr_reg_t is defined, > like i915_reg_t and _MMIO(). It's a more natural place for such a > definition so it's not mixed with the registers for the platforms. > > Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> > --- > drivers/gpu/drm/i915/gt/intel_gt_regs.h | 2 -- > drivers/gpu/drm/i915/i915_reg_defs.h | 2 ++ > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h > index 416976d396ba..de2e85fd2f93 100644 > --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h > +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h > @@ -9,8 +9,6 @@ > #include "i915_reg_defs.h" > #include "display/intel_display_reg_defs.h" /* VLV_DISPLAY_BASE */ > > -#define MCR_REG(offset) ((const i915_mcr_reg_t){ .reg = (offset) }) > - > /* > * The perf control registers are technically multicast registers, but the > * driver never needs to read/write them directly; we only use them to build > diff --git a/drivers/gpu/drm/i915/i915_reg_defs.h b/drivers/gpu/drm/i915/i915_reg_defs.h > index 983c5aa3045b..db26de6b57bc 100644 > --- a/drivers/gpu/drm/i915/i915_reg_defs.h > +++ b/drivers/gpu/drm/i915/i915_reg_defs.h > @@ -165,6 +165,8 @@ typedef struct { > u32 reg; > } i915_mcr_reg_t; > > +#define MCR_REG(offset) ((const i915_mcr_reg_t){ .reg = (offset) }) > + > #define INVALID_MMIO_REG _MMIO(0) > > /* > -- > 2.39.0 >
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h b/drivers/gpu/drm/i915/gt/intel_gt_regs.h index 416976d396ba..de2e85fd2f93 100644 --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h @@ -9,8 +9,6 @@ #include "i915_reg_defs.h" #include "display/intel_display_reg_defs.h" /* VLV_DISPLAY_BASE */ -#define MCR_REG(offset) ((const i915_mcr_reg_t){ .reg = (offset) }) - /* * The perf control registers are technically multicast registers, but the * driver never needs to read/write them directly; we only use them to build diff --git a/drivers/gpu/drm/i915/i915_reg_defs.h b/drivers/gpu/drm/i915/i915_reg_defs.h index 983c5aa3045b..db26de6b57bc 100644 --- a/drivers/gpu/drm/i915/i915_reg_defs.h +++ b/drivers/gpu/drm/i915/i915_reg_defs.h @@ -165,6 +165,8 @@ typedef struct { u32 reg; } i915_mcr_reg_t; +#define MCR_REG(offset) ((const i915_mcr_reg_t){ .reg = (offset) }) + #define INVALID_MMIO_REG _MMIO(0) /*
Define MCR_REG() in the same header where i915_mcr_reg_t is defined, like i915_reg_t and _MMIO(). It's a more natural place for such a definition so it's not mixed with the registers for the platforms. Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com> --- drivers/gpu/drm/i915/gt/intel_gt_regs.h | 2 -- drivers/gpu/drm/i915/i915_reg_defs.h | 2 ++ 2 files changed, 2 insertions(+), 2 deletions(-)