diff mbox series

[v3,21/25] drm/i915/dp_mst: Enable DSC decompression if any stream needs this

Message ID 20230914192659.757475-22-imre.deak@intel.com (mailing list archive)
State New, archived
Headers show
Series drm/i915: Improve BW management on shared display links | expand

Commit Message

Imre Deak Sept. 14, 2023, 7:26 p.m. UTC 
Atm DSC decompression is enabled in the sink only if the first stream is
compressed. This left compressed streams blank if the first stream was
uncompressed.

Enable decompression whenever FEC is enabled, which will be true for all
streams if any stream is compressed. Enabling FEC correctly in all
streams will be only fixed by an upcoming patch.

Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index e942eb95d688f..ce8eafa4ece06 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2917,7 +2917,13 @@  void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp,
 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
 	int ret;
 
-	if (!crtc_state->dsc.compression_enable)
+	/*
+	 * In case of MST any stream can be compressed not just the first. If
+	 * any stream is compressed FEC will be enabled in all streams, so toggle
+	 * decompression whenever FEC is enabled.
+	 */
+	if (!crtc_state->dsc.compression_enable &&
+	    !crtc_state->fec_enable)
 		return;
 
 	ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_DSC_ENABLE,