diff mbox series

[3/4] drm/i915/dp_mst: Use helpers to get dsc min/max input bpc

Message ID 20231123042733.1027046-4-ankit.k.nautiyal@intel.com (mailing list archive)
State New, archived
Headers show
Series DP DSC min/max src bpc fixes | expand

Commit Message

Nautiyal, Ankit K Nov. 23, 2023, 4:27 a.m. UTC 
Use helpers for source min/max input bpc with DSC.

Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c     |  2 --
 drivers/gpu/drm/i915/display/intel_dp.h     |  2 ++
 drivers/gpu/drm/i915/display/intel_dp_mst.c | 11 ++++-------
 3 files changed, 6 insertions(+), 9 deletions(-)

Comments

Jani Nikula Nov. 24, 2023, 1:16 p.m. UTC | #1 
On Thu, 23 Nov 2023, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> Use helpers for source min/max input bpc with DSC.
>
> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c     |  2 --
>  drivers/gpu/drm/i915/display/intel_dp.h     |  2 ++
>  drivers/gpu/drm/i915/display/intel_dp_mst.c | 11 ++++-------
>  3 files changed, 6 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 37320cc4346f..0f5040c114b3 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1622,7 +1622,6 @@ intel_dp_compute_link_config_wide(struct intel_dp *intel_dp,
>  	return -EINVAL;
>  }
>  
> -static
>  u8 intel_dp_dsc_max_src_input_bpc(struct drm_i915_private *i915)

It would probably be for the best to make these ints instead of u8.

BR,
Jani.

>  {
>  	if (!HAS_DSC(i915))
> @@ -2022,7 +2021,6 @@ static int dsc_compute_compressed_bpp(struct intel_dp *intel_dp,
>  					   dsc_max_bpp, dsc_min_bpp, pipe_bpp, timeslots);
>  }
>  
> -static
>  u8 intel_dp_dsc_min_src_input_bpc(struct drm_i915_private *i915)
>  {
>  	/* Min DSC Input BPC for ICL+ is 8 */
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
> index 05db46b111f2..931c5eb71cd0 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -184,5 +184,7 @@ intel_dp_compute_config_link_bpp_limits(struct intel_dp *intel_dp,
>  					struct link_config_limits *limits);
>  
>  void intel_dp_get_dsc_sink_cap(u8 dpcd_rev, struct intel_connector *connector);
> +u8 intel_dp_dsc_max_src_input_bpc(struct drm_i915_private *i915);
> +u8 intel_dp_dsc_min_src_input_bpc(struct drm_i915_private *i915);
>  
>  #endif /* __INTEL_DP_H__ */
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index d3d53e1b4489..337db31777df 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -293,17 +293,14 @@ static int intel_dp_dsc_mst_compute_link_config(struct intel_encoder *encoder,
>  	int i, num_bpc;
>  	u8 dsc_bpc[3] = {};
>  	int min_bpp, max_bpp, sink_min_bpp, sink_max_bpp;
> -	u8 dsc_max_bpc;
> +	u8 dsc_max_bpc, dsc_min_bpc;
>  	int min_compressed_bpp, max_compressed_bpp;
>  
> -	/* Max DSC Input BPC for ICL is 10 and for TGL+ is 12 */
> -	if (DISPLAY_VER(i915) >= 12)
> -		dsc_max_bpc = min_t(u8, 12, conn_state->max_requested_bpc);
> -	else
> -		dsc_max_bpc = min_t(u8, 10, conn_state->max_requested_bpc);
> +	dsc_max_bpc = intel_dp_dsc_max_src_input_bpc(i915);
> +	dsc_min_bpc = intel_dp_dsc_min_src_input_bpc(i915);
>  
>  	max_bpp = min_t(u8, dsc_max_bpc * 3, limits->pipe.max_bpp);
> -	min_bpp = limits->pipe.min_bpp;
> +	min_bpp = max_t(u8, dsc_min_bpc * 3, limits->pipe.min_bpp);
>  
>  	num_bpc = drm_dp_dsc_sink_supported_input_bpcs(connector->dp.dsc_dpcd,
>  						       dsc_bpc);
Nautiyal, Ankit K Nov. 27, 2023, 6:21 a.m. UTC | #2 
On 11/24/2023 6:46 PM, Jani Nikula wrote:
> On Thu, 23 Nov 2023, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
>> Use helpers for source min/max input bpc with DSC.
>>
>> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
>> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
>> ---
>>   drivers/gpu/drm/i915/display/intel_dp.c     |  2 --
>>   drivers/gpu/drm/i915/display/intel_dp.h     |  2 ++
>>   drivers/gpu/drm/i915/display/intel_dp_mst.c | 11 ++++-------
>>   3 files changed, 6 insertions(+), 9 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
>> index 37320cc4346f..0f5040c114b3 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> @@ -1622,7 +1622,6 @@ intel_dp_compute_link_config_wide(struct intel_dp *intel_dp,
>>   	return -EINVAL;
>>   }
>>   
>> -static
>>   u8 intel_dp_dsc_max_src_input_bpc(struct drm_i915_private *i915)
> It would probably be for the best to make these ints instead of u8.


Alright, will change return type to int and re-send this patch.

Regards,

Ankit

>
> BR,
> Jani.
>
>>   {
>>   	if (!HAS_DSC(i915))
>> @@ -2022,7 +2021,6 @@ static int dsc_compute_compressed_bpp(struct intel_dp *intel_dp,
>>   					   dsc_max_bpp, dsc_min_bpp, pipe_bpp, timeslots);
>>   }
>>   
>> -static
>>   u8 intel_dp_dsc_min_src_input_bpc(struct drm_i915_private *i915)
>>   {
>>   	/* Min DSC Input BPC for ICL+ is 8 */
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
>> index 05db46b111f2..931c5eb71cd0 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp.h
>> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
>> @@ -184,5 +184,7 @@ intel_dp_compute_config_link_bpp_limits(struct intel_dp *intel_dp,
>>   					struct link_config_limits *limits);
>>   
>>   void intel_dp_get_dsc_sink_cap(u8 dpcd_rev, struct intel_connector *connector);
>> +u8 intel_dp_dsc_max_src_input_bpc(struct drm_i915_private *i915);
>> +u8 intel_dp_dsc_min_src_input_bpc(struct drm_i915_private *i915);
>>   
>>   #endif /* __INTEL_DP_H__ */
>> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
>> index d3d53e1b4489..337db31777df 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
>> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
>> @@ -293,17 +293,14 @@ static int intel_dp_dsc_mst_compute_link_config(struct intel_encoder *encoder,
>>   	int i, num_bpc;
>>   	u8 dsc_bpc[3] = {};
>>   	int min_bpp, max_bpp, sink_min_bpp, sink_max_bpp;
>> -	u8 dsc_max_bpc;
>> +	u8 dsc_max_bpc, dsc_min_bpc;
>>   	int min_compressed_bpp, max_compressed_bpp;
>>   
>> -	/* Max DSC Input BPC for ICL is 10 and for TGL+ is 12 */
>> -	if (DISPLAY_VER(i915) >= 12)
>> -		dsc_max_bpc = min_t(u8, 12, conn_state->max_requested_bpc);
>> -	else
>> -		dsc_max_bpc = min_t(u8, 10, conn_state->max_requested_bpc);
>> +	dsc_max_bpc = intel_dp_dsc_max_src_input_bpc(i915);
>> +	dsc_min_bpc = intel_dp_dsc_min_src_input_bpc(i915);
>>   
>>   	max_bpp = min_t(u8, dsc_max_bpc * 3, limits->pipe.max_bpp);
>> -	min_bpp = limits->pipe.min_bpp;
>> +	min_bpp = max_t(u8, dsc_min_bpc * 3, limits->pipe.min_bpp);
>>   
>>   	num_bpc = drm_dp_dsc_sink_supported_input_bpcs(connector->dp.dsc_dpcd,
>>   						       dsc_bpc);
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 37320cc4346f..0f5040c114b3 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1622,7 +1622,6 @@  intel_dp_compute_link_config_wide(struct intel_dp *intel_dp,
 	return -EINVAL;
 }
 
-static
 u8 intel_dp_dsc_max_src_input_bpc(struct drm_i915_private *i915)
 {
 	if (!HAS_DSC(i915))
@@ -2022,7 +2021,6 @@  static int dsc_compute_compressed_bpp(struct intel_dp *intel_dp,
 					   dsc_max_bpp, dsc_min_bpp, pipe_bpp, timeslots);
 }
 
-static
 u8 intel_dp_dsc_min_src_input_bpc(struct drm_i915_private *i915)
 {
 	/* Min DSC Input BPC for ICL+ is 8 */
diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h
index 05db46b111f2..931c5eb71cd0 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.h
+++ b/drivers/gpu/drm/i915/display/intel_dp.h
@@ -184,5 +184,7 @@  intel_dp_compute_config_link_bpp_limits(struct intel_dp *intel_dp,
 					struct link_config_limits *limits);
 
 void intel_dp_get_dsc_sink_cap(u8 dpcd_rev, struct intel_connector *connector);
+u8 intel_dp_dsc_max_src_input_bpc(struct drm_i915_private *i915);
+u8 intel_dp_dsc_min_src_input_bpc(struct drm_i915_private *i915);
 
 #endif /* __INTEL_DP_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index d3d53e1b4489..337db31777df 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -293,17 +293,14 @@  static int intel_dp_dsc_mst_compute_link_config(struct intel_encoder *encoder,
 	int i, num_bpc;
 	u8 dsc_bpc[3] = {};
 	int min_bpp, max_bpp, sink_min_bpp, sink_max_bpp;
-	u8 dsc_max_bpc;
+	u8 dsc_max_bpc, dsc_min_bpc;
 	int min_compressed_bpp, max_compressed_bpp;
 
-	/* Max DSC Input BPC for ICL is 10 and for TGL+ is 12 */
-	if (DISPLAY_VER(i915) >= 12)
-		dsc_max_bpc = min_t(u8, 12, conn_state->max_requested_bpc);
-	else
-		dsc_max_bpc = min_t(u8, 10, conn_state->max_requested_bpc);
+	dsc_max_bpc = intel_dp_dsc_max_src_input_bpc(i915);
+	dsc_min_bpc = intel_dp_dsc_min_src_input_bpc(i915);
 
 	max_bpp = min_t(u8, dsc_max_bpc * 3, limits->pipe.max_bpp);
-	min_bpp = limits->pipe.min_bpp;
+	min_bpp = max_t(u8, dsc_min_bpc * 3, limits->pipe.min_bpp);
 
 	num_bpc = drm_dp_dsc_sink_supported_input_bpcs(connector->dp.dsc_dpcd,
 						       dsc_bpc);