| Message ID | 20231218175004.52875-3-jouni.hogander@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Early Transport for Panel Replay and PSR | expand |
> -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Jouni Högander > Sent: Monday, December 18, 2023 7:50 PM > To: intel-gfx@lists.freedesktop.org > Subject: [PATCH 2/7] drm/i915/psr: Extend SU area to cover cursor fully if needed > > In case early transport is enabled SU area needs to be extended to cover cursor area fully when cursor is in SU area. > > Bspec: 68927 > Reviewed-by: Mika Kahola <mika.kahola@intel.com> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com> > --- > drivers/gpu/drm/i915/display/intel_psr.c | 38 +++++++++++++++++++++++- > 1 file changed, 37 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c > index b6e2e70e1290..8a350b9e33cd 100644 > --- a/drivers/gpu/drm/i915/display/intel_psr.c > +++ b/drivers/gpu/drm/i915/display/intel_psr.c > @@ -2011,6 +2011,29 @@ static void intel_psr2_sel_fetch_pipe_alignment(const struct intel_crtc_state *c > pipe_clip->y2 = ((pipe_clip->y2 / y_alignment) + 1) * y_alignment; } > > +/* > + * When early transport is in use we need to extend SU area to cover > + * cursor fully when cursor is in SU area. > + */ > +static void > +intel_psr2_sel_fetch_et_alignment(struct intel_crtc_state *crtc_state, > + struct intel_plane_state *cursor_state, > + struct drm_rect *pipe_clip) > +{ > + struct drm_rect inter; > + > + if (!crtc_state->enable_psr2_su_region_et || > + !cursor_state->uapi.visible) > + return; > + > + inter = *pipe_clip; > + if (!drm_rect_intersect(&inter, &cursor_state->uapi.dst)) > + return; > + > + clip_area_update(pipe_clip, &cursor_state->uapi.dst, > + &crtc_state->pipe_src); > +} > + > /* > * TODO: Not clear how to handle planes with negative position, > * also planes are not updated if they have a negative X @@ -2052,7 +2075,8 @@ int intel_psr2_sel_fetch_update(struct > intel_atomic_state *state, > struct drm_i915_private *dev_priv = to_i915(state->base.dev); > struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc); > struct drm_rect pipe_clip = { .x1 = 0, .y1 = -1, .x2 = INT_MAX, .y2 = -1 }; > - struct intel_plane_state *new_plane_state, *old_plane_state; > + struct intel_plane_state *new_plane_state, *old_plane_state, > + *cursor_plane_state = NULL; > struct intel_plane *plane; > bool full_update = false; > int i, ret; > @@ -2132,6 +2156,13 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state, > damaged_area.x2 += new_plane_state->uapi.dst.x1 - src.x1; > > clip_area_update(&pipe_clip, &damaged_area, &crtc_state->pipe_src); > + > + /* > + * Cursor plane new state is stored to adjust su area to cover > + * cursor are fully. > + */ > + if (plane->id == PLANE_CURSOR) > + cursor_plane_state = new_plane_state; > } > > /* > @@ -2160,6 +2191,11 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state, > if (ret) > return ret; > > + /* Adjust su area to cover cursor fully as necessary */ > + if (cursor_plane_state) > + intel_psr2_sel_fetch_et_alignment(crtc_state, cursor_plane_state, > + &pipe_clip); > + > intel_psr2_sel_fetch_pipe_alignment(crtc_state, &pipe_clip); > > /* > -- > 2.34.1
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index b6e2e70e1290..8a350b9e33cd 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -2011,6 +2011,29 @@ static void intel_psr2_sel_fetch_pipe_alignment(const struct intel_crtc_state *c pipe_clip->y2 = ((pipe_clip->y2 / y_alignment) + 1) * y_alignment; } +/* + * When early transport is in use we need to extend SU area to cover + * cursor fully when cursor is in SU area. + */ +static void +intel_psr2_sel_fetch_et_alignment(struct intel_crtc_state *crtc_state, + struct intel_plane_state *cursor_state, + struct drm_rect *pipe_clip) +{ + struct drm_rect inter; + + if (!crtc_state->enable_psr2_su_region_et || + !cursor_state->uapi.visible) + return; + + inter = *pipe_clip; + if (!drm_rect_intersect(&inter, &cursor_state->uapi.dst)) + return; + + clip_area_update(pipe_clip, &cursor_state->uapi.dst, + &crtc_state->pipe_src); +} + /* * TODO: Not clear how to handle planes with negative position, * also planes are not updated if they have a negative X @@ -2052,7 +2075,8 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state, struct drm_i915_private *dev_priv = to_i915(state->base.dev); struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc); struct drm_rect pipe_clip = { .x1 = 0, .y1 = -1, .x2 = INT_MAX, .y2 = -1 }; - struct intel_plane_state *new_plane_state, *old_plane_state; + struct intel_plane_state *new_plane_state, *old_plane_state, + *cursor_plane_state = NULL; struct intel_plane *plane; bool full_update = false; int i, ret; @@ -2132,6 +2156,13 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state, damaged_area.x2 += new_plane_state->uapi.dst.x1 - src.x1; clip_area_update(&pipe_clip, &damaged_area, &crtc_state->pipe_src); + + /* + * Cursor plane new state is stored to adjust su area to cover + * cursor are fully. + */ + if (plane->id == PLANE_CURSOR) + cursor_plane_state = new_plane_state; } /* @@ -2160,6 +2191,11 @@ int intel_psr2_sel_fetch_update(struct intel_atomic_state *state, if (ret) return ret; + /* Adjust su area to cover cursor fully as necessary */ + if (cursor_plane_state) + intel_psr2_sel_fetch_et_alignment(crtc_state, cursor_plane_state, + &pipe_clip); + intel_psr2_sel_fetch_pipe_alignment(crtc_state, &pipe_clip); /*
In case early transport is enabled SU area needs to be extended to cover cursor area fully when cursor is in SU area. Bspec: 68927 Signed-off-by: Jouni Högander <jouni.hogander@intel.com> --- drivers/gpu/drm/i915/display/intel_psr.c | 38 +++++++++++++++++++++++- 1 file changed, 37 insertions(+), 1 deletion(-)