| Message ID | 20240329011254.24160-22-ville.syrjala@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: Bigjoiner modeset sequence redesign and MST support | expand |
> -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of Ville > Syrjala > Sent: Friday, March 29, 2024 6:43 AM > To: intel-gfx@lists.freedesktop.org > Cc: Manasi Navare <navaremanasi@chromium.org>; Ville Syrjälä > <ville.syrjala@linux.intel.com> > Subject: [PATCH 21/22] drm/i915: Allow bigjoiner for MST > > From: Vidya Srinivas <vidya.srinivas@intel.com> > > We need bigjoiner support with MST functionality for MST monitor resolutions > > 5K to work. > Adding support for the same. > > v2: Addressed review comments from Jani. > Revert rejection of MST bigjoiner modes and add functionality > > v3: Fixed pipe_mismatch WARN for mst_master_transcoder > Credits-to: Manasi Navare <navaremanasi@chromium.org> > > v4: Utilize intel_crtc_joined_pipe_mask() also for handling > bigjoiner slave pipes for MST case(Stan) > [v5: vsyrjala: chunked the modeset squence stuff out, > removed bogus mst master transcoder hack, > keep mgr_lock near the full_pbn check] > > Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com> > Reviewed-by: Manasi Navare <navaremanasi@chromium.org> > Co-developed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> Thanks and Regards, Arun R Murthy ------------------- > drivers/gpu/drm/i915/display/intel_dp_mst.c | 25 ++++++++++++--------- > 1 file changed, 14 insertions(+), 11 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c > b/drivers/gpu/drm/i915/display/intel_dp_mst.c > index 2d601d214915..c1530c01f541 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c > @@ -525,6 +525,7 @@ static int intel_dp_mst_compute_config(struct > intel_encoder *encoder, { > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > struct intel_atomic_state *state = to_intel_atomic_state(conn_state- > >state); > + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); > struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); > struct intel_dp *intel_dp = &intel_mst->primary->dp; > struct intel_connector *connector = > @@ -542,6 +543,11 @@ static int intel_dp_mst_compute_config(struct > intel_encoder *encoder, > if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) > return -EINVAL; > > + if (intel_dp_need_bigjoiner(intel_dp, connector, > + adjusted_mode->crtc_hdisplay, > + adjusted_mode->crtc_clock)) > + pipe_config->bigjoiner_pipes = GENMASK(crtc->pipe + 1, crtc- > >pipe); > + > pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB; > pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; > pipe_config->has_pch_encoder = false; > @@ -1341,10 +1347,6 @@ intel_dp_mst_mode_valid_ctx(struct > drm_connector *connector, > max_link_clock, max_lanes); > mode_rate = intel_dp_link_required(mode->clock, min_bpp); > > - ret = drm_modeset_lock(&mgr->base.lock, ctx); > - if (ret) > - return ret; > - > /* > * TODO: > * - Also check if compression would allow for the mode @@ -1357,17 > +1359,18 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, > * corresponding link capabilities of the sink) in case the > * stream is uncompressed for it by the last branch device. > */ > - if (mode_rate > max_rate || mode->clock > max_dotclk || > - drm_dp_calc_pbn_mode(mode->clock, min_bpp << 4) > port- > >full_pbn) { > - *status = MODE_CLOCK_HIGH; > - return 0; > - } > if (intel_dp_need_bigjoiner(intel_dp, intel_connector, > mode->hdisplay, target_clock)) { > bigjoiner = true; > max_dotclk *= 2; > + } > > - /* TODO: add support for bigjoiner */ > + ret = drm_modeset_lock(&mgr->base.lock, ctx); > + if (ret) > + return ret; > + > + if (mode_rate > max_rate || mode->clock > max_dotclk || > + drm_dp_calc_pbn_mode(mode->clock, min_bpp << 4) > port- > >full_pbn) > +{ > *status = MODE_CLOCK_HIGH; > return 0; > } > @@ -1410,7 +1413,7 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector > *connector, > return 0; > } > > - *status = intel_mode_valid_max_plane_size(dev_priv, mode, false); > + *status = intel_mode_valid_max_plane_size(dev_priv, mode, bigjoiner); > return 0; > } > > -- > 2.43.2
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 2d601d214915..c1530c01f541 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -525,6 +525,7 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder, { struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state); + struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc); struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder); struct intel_dp *intel_dp = &intel_mst->primary->dp; struct intel_connector *connector = @@ -542,6 +543,11 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder, if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) return -EINVAL; + if (intel_dp_need_bigjoiner(intel_dp, connector, + adjusted_mode->crtc_hdisplay, + adjusted_mode->crtc_clock)) + pipe_config->bigjoiner_pipes = GENMASK(crtc->pipe + 1, crtc->pipe); + pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB; pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; pipe_config->has_pch_encoder = false; @@ -1341,10 +1347,6 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, max_link_clock, max_lanes); mode_rate = intel_dp_link_required(mode->clock, min_bpp); - ret = drm_modeset_lock(&mgr->base.lock, ctx); - if (ret) - return ret; - /* * TODO: * - Also check if compression would allow for the mode @@ -1357,17 +1359,18 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, * corresponding link capabilities of the sink) in case the * stream is uncompressed for it by the last branch device. */ - if (mode_rate > max_rate || mode->clock > max_dotclk || - drm_dp_calc_pbn_mode(mode->clock, min_bpp << 4) > port->full_pbn) { - *status = MODE_CLOCK_HIGH; - return 0; - } if (intel_dp_need_bigjoiner(intel_dp, intel_connector, mode->hdisplay, target_clock)) { bigjoiner = true; max_dotclk *= 2; + } - /* TODO: add support for bigjoiner */ + ret = drm_modeset_lock(&mgr->base.lock, ctx); + if (ret) + return ret; + + if (mode_rate > max_rate || mode->clock > max_dotclk || + drm_dp_calc_pbn_mode(mode->clock, min_bpp << 4) > port->full_pbn) { *status = MODE_CLOCK_HIGH; return 0; } @@ -1410,7 +1413,7 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, return 0; } - *status = intel_mode_valid_max_plane_size(dev_priv, mode, false); + *status = intel_mode_valid_max_plane_size(dev_priv, mode, bigjoiner); return 0; }