| Message ID | 20240510152329.24098-6-ville.syrjala@linux.intel.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | drm/i915: skl+ plane register stuff | expand |
On Fri, 10 May 2024, Ville Syrjala <ville.syrjala@linux.intel.com> wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > Stop hand rolling PLANE_AUX_DIST() and just use the real thing. > > Cc: Zhenyu Wang <zhenyuw@linux.intel.com> > CC: Zhi Wang <zhi.wang.linux@gmail.com> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> > --- > drivers/gpu/drm/i915/gvt/handlers.c | 24 ++++++++++----------- > drivers/gpu/drm/i915/gvt/reg.h | 1 - > drivers/gpu/drm/i915/intel_gvt_mmio_table.c | 24 ++++++++++----------- > 3 files changed, 24 insertions(+), 25 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c > index 6c857beb5083..6b02612ddef5 100644 > --- a/drivers/gpu/drm/i915/gvt/handlers.c > +++ b/drivers/gpu/drm/i915/gvt/handlers.c > @@ -2678,20 +2678,20 @@ static int init_skl_mmio_info(struct intel_gvt *gvt) > MMIO_DH(PLANE_NV12_BUF_CFG(PIPE_C, 2), D_SKL_PLUS, NULL, NULL); > MMIO_DH(PLANE_NV12_BUF_CFG(PIPE_C, 3), D_SKL_PLUS, NULL, NULL); > > - MMIO_DH(_MMIO(_REG_701C0(PIPE_A, 1)), D_SKL_PLUS, NULL, NULL); > - MMIO_DH(_MMIO(_REG_701C0(PIPE_A, 2)), D_SKL_PLUS, NULL, NULL); > - MMIO_DH(_MMIO(_REG_701C0(PIPE_A, 3)), D_SKL_PLUS, NULL, NULL); > - MMIO_DH(_MMIO(_REG_701C0(PIPE_A, 4)), D_SKL_PLUS, NULL, NULL); > + MMIO_DH(PLANE_AUX_DIST(PIPE_A, 0), D_SKL_PLUS, NULL, NULL); > + MMIO_DH(PLANE_AUX_DIST(PIPE_A, 1), D_SKL_PLUS, NULL, NULL); > + MMIO_DH(PLANE_AUX_DIST(PIPE_A, 2), D_SKL_PLUS, NULL, NULL); > + MMIO_DH(PLANE_AUX_DIST(PIPE_A, 3), D_SKL_PLUS, NULL, NULL); > > - MMIO_DH(_MMIO(_REG_701C0(PIPE_B, 1)), D_SKL_PLUS, NULL, NULL); > - MMIO_DH(_MMIO(_REG_701C0(PIPE_B, 2)), D_SKL_PLUS, NULL, NULL); > - MMIO_DH(_MMIO(_REG_701C0(PIPE_B, 3)), D_SKL_PLUS, NULL, NULL); > - MMIO_DH(_MMIO(_REG_701C0(PIPE_B, 4)), D_SKL_PLUS, NULL, NULL); > + MMIO_DH(PLANE_AUX_DIST(PIPE_B, 0), D_SKL_PLUS, NULL, NULL); > + MMIO_DH(PLANE_AUX_DIST(PIPE_B, 1), D_SKL_PLUS, NULL, NULL); > + MMIO_DH(PLANE_AUX_DIST(PIPE_B, 2), D_SKL_PLUS, NULL, NULL); > + MMIO_DH(PLANE_AUX_DIST(PIPE_B, 3), D_SKL_PLUS, NULL, NULL); > > - MMIO_DH(_MMIO(_REG_701C0(PIPE_C, 1)), D_SKL_PLUS, NULL, NULL); > - MMIO_DH(_MMIO(_REG_701C0(PIPE_C, 2)), D_SKL_PLUS, NULL, NULL); > - MMIO_DH(_MMIO(_REG_701C0(PIPE_C, 3)), D_SKL_PLUS, NULL, NULL); > - MMIO_DH(_MMIO(_REG_701C0(PIPE_C, 4)), D_SKL_PLUS, NULL, NULL); > + MMIO_DH(PLANE_AUX_DIST(PIPE_C, 0), D_SKL_PLUS, NULL, NULL); > + MMIO_DH(PLANE_AUX_DIST(PIPE_C, 1), D_SKL_PLUS, NULL, NULL); > + MMIO_DH(PLANE_AUX_DIST(PIPE_C, 2), D_SKL_PLUS, NULL, NULL); > + MMIO_DH(PLANE_AUX_DIST(PIPE_C, 3), D_SKL_PLUS, NULL, NULL); > > MMIO_DH(_MMIO(_REG_701C4(PIPE_A, 1)), D_SKL_PLUS, NULL, NULL); > MMIO_DH(_MMIO(_REG_701C4(PIPE_A, 2)), D_SKL_PLUS, NULL, NULL); > diff --git a/drivers/gpu/drm/i915/gvt/reg.h b/drivers/gpu/drm/i915/gvt/reg.h > index d8216c63c39a..e8a56faafe95 100644 > --- a/drivers/gpu/drm/i915/gvt/reg.h > +++ b/drivers/gpu/drm/i915/gvt/reg.h > @@ -57,7 +57,6 @@ > > #define VGT_SPRSTRIDE(pipe) _PIPE(pipe, _SPRA_STRIDE, _PLANE_STRIDE_2_B) > > -#define _REG_701C0(pipe, plane) (0x701c0 + pipe * 0x1000 + (plane - 1) * 0x100) > #define _REG_701C4(pipe, plane) (0x701c4 + pipe * 0x1000 + (plane - 1) * 0x100) > > #define SKL_FLIP_EVENT(pipe, plane) (PRIMARY_A_FLIP_DONE + (plane) * 3 + (pipe)) > diff --git a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c > index 3b79c1c84b79..cf45342a6db0 100644 > --- a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c > +++ b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c > @@ -1006,18 +1006,18 @@ static int iterate_skl_plus_mmio(struct intel_gvt_mmio_table_iter *iter) > MMIO_D(PLANE_NV12_BUF_CFG(PIPE_C, 1)); > MMIO_D(PLANE_NV12_BUF_CFG(PIPE_C, 2)); > MMIO_D(PLANE_NV12_BUF_CFG(PIPE_C, 3)); > - MMIO_D(_MMIO(_REG_701C0(PIPE_A, 1))); > - MMIO_D(_MMIO(_REG_701C0(PIPE_A, 2))); > - MMIO_D(_MMIO(_REG_701C0(PIPE_A, 3))); > - MMIO_D(_MMIO(_REG_701C0(PIPE_A, 4))); > - MMIO_D(_MMIO(_REG_701C0(PIPE_B, 1))); > - MMIO_D(_MMIO(_REG_701C0(PIPE_B, 2))); > - MMIO_D(_MMIO(_REG_701C0(PIPE_B, 3))); > - MMIO_D(_MMIO(_REG_701C0(PIPE_B, 4))); > - MMIO_D(_MMIO(_REG_701C0(PIPE_C, 1))); > - MMIO_D(_MMIO(_REG_701C0(PIPE_C, 2))); > - MMIO_D(_MMIO(_REG_701C0(PIPE_C, 3))); > - MMIO_D(_MMIO(_REG_701C0(PIPE_C, 4))); > + MMIO_D(PLANE_AUX_DIST(PIPE_A, 0)); > + MMIO_D(PLANE_AUX_DIST(PIPE_A, 1)); > + MMIO_D(PLANE_AUX_DIST(PIPE_A, 2)); > + MMIO_D(PLANE_AUX_DIST(PIPE_A, 3)); > + MMIO_D(PLANE_AUX_DIST(PIPE_B, 0)); > + MMIO_D(PLANE_AUX_DIST(PIPE_B, 1)); > + MMIO_D(PLANE_AUX_DIST(PIPE_B, 2)); > + MMIO_D(PLANE_AUX_DIST(PIPE_B, 3)); > + MMIO_D(PLANE_AUX_DIST(PIPE_C, 0)); > + MMIO_D(PLANE_AUX_DIST(PIPE_C, 1)); > + MMIO_D(PLANE_AUX_DIST(PIPE_C, 2)); > + MMIO_D(PLANE_AUX_DIST(PIPE_C, 3)); > MMIO_D(_MMIO(_REG_701C4(PIPE_A, 1))); > MMIO_D(_MMIO(_REG_701C4(PIPE_A, 2))); > MMIO_D(_MMIO(_REG_701C4(PIPE_A, 3)));
diff --git a/drivers/gpu/drm/i915/gvt/handlers.c b/drivers/gpu/drm/i915/gvt/handlers.c index 6c857beb5083..6b02612ddef5 100644 --- a/drivers/gpu/drm/i915/gvt/handlers.c +++ b/drivers/gpu/drm/i915/gvt/handlers.c @@ -2678,20 +2678,20 @@ static int init_skl_mmio_info(struct intel_gvt *gvt) MMIO_DH(PLANE_NV12_BUF_CFG(PIPE_C, 2), D_SKL_PLUS, NULL, NULL); MMIO_DH(PLANE_NV12_BUF_CFG(PIPE_C, 3), D_SKL_PLUS, NULL, NULL); - MMIO_DH(_MMIO(_REG_701C0(PIPE_A, 1)), D_SKL_PLUS, NULL, NULL); - MMIO_DH(_MMIO(_REG_701C0(PIPE_A, 2)), D_SKL_PLUS, NULL, NULL); - MMIO_DH(_MMIO(_REG_701C0(PIPE_A, 3)), D_SKL_PLUS, NULL, NULL); - MMIO_DH(_MMIO(_REG_701C0(PIPE_A, 4)), D_SKL_PLUS, NULL, NULL); + MMIO_DH(PLANE_AUX_DIST(PIPE_A, 0), D_SKL_PLUS, NULL, NULL); + MMIO_DH(PLANE_AUX_DIST(PIPE_A, 1), D_SKL_PLUS, NULL, NULL); + MMIO_DH(PLANE_AUX_DIST(PIPE_A, 2), D_SKL_PLUS, NULL, NULL); + MMIO_DH(PLANE_AUX_DIST(PIPE_A, 3), D_SKL_PLUS, NULL, NULL); - MMIO_DH(_MMIO(_REG_701C0(PIPE_B, 1)), D_SKL_PLUS, NULL, NULL); - MMIO_DH(_MMIO(_REG_701C0(PIPE_B, 2)), D_SKL_PLUS, NULL, NULL); - MMIO_DH(_MMIO(_REG_701C0(PIPE_B, 3)), D_SKL_PLUS, NULL, NULL); - MMIO_DH(_MMIO(_REG_701C0(PIPE_B, 4)), D_SKL_PLUS, NULL, NULL); + MMIO_DH(PLANE_AUX_DIST(PIPE_B, 0), D_SKL_PLUS, NULL, NULL); + MMIO_DH(PLANE_AUX_DIST(PIPE_B, 1), D_SKL_PLUS, NULL, NULL); + MMIO_DH(PLANE_AUX_DIST(PIPE_B, 2), D_SKL_PLUS, NULL, NULL); + MMIO_DH(PLANE_AUX_DIST(PIPE_B, 3), D_SKL_PLUS, NULL, NULL); - MMIO_DH(_MMIO(_REG_701C0(PIPE_C, 1)), D_SKL_PLUS, NULL, NULL); - MMIO_DH(_MMIO(_REG_701C0(PIPE_C, 2)), D_SKL_PLUS, NULL, NULL); - MMIO_DH(_MMIO(_REG_701C0(PIPE_C, 3)), D_SKL_PLUS, NULL, NULL); - MMIO_DH(_MMIO(_REG_701C0(PIPE_C, 4)), D_SKL_PLUS, NULL, NULL); + MMIO_DH(PLANE_AUX_DIST(PIPE_C, 0), D_SKL_PLUS, NULL, NULL); + MMIO_DH(PLANE_AUX_DIST(PIPE_C, 1), D_SKL_PLUS, NULL, NULL); + MMIO_DH(PLANE_AUX_DIST(PIPE_C, 2), D_SKL_PLUS, NULL, NULL); + MMIO_DH(PLANE_AUX_DIST(PIPE_C, 3), D_SKL_PLUS, NULL, NULL); MMIO_DH(_MMIO(_REG_701C4(PIPE_A, 1)), D_SKL_PLUS, NULL, NULL); MMIO_DH(_MMIO(_REG_701C4(PIPE_A, 2)), D_SKL_PLUS, NULL, NULL); diff --git a/drivers/gpu/drm/i915/gvt/reg.h b/drivers/gpu/drm/i915/gvt/reg.h index d8216c63c39a..e8a56faafe95 100644 --- a/drivers/gpu/drm/i915/gvt/reg.h +++ b/drivers/gpu/drm/i915/gvt/reg.h @@ -57,7 +57,6 @@ #define VGT_SPRSTRIDE(pipe) _PIPE(pipe, _SPRA_STRIDE, _PLANE_STRIDE_2_B) -#define _REG_701C0(pipe, plane) (0x701c0 + pipe * 0x1000 + (plane - 1) * 0x100) #define _REG_701C4(pipe, plane) (0x701c4 + pipe * 0x1000 + (plane - 1) * 0x100) #define SKL_FLIP_EVENT(pipe, plane) (PRIMARY_A_FLIP_DONE + (plane) * 3 + (pipe)) diff --git a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c index 3b79c1c84b79..cf45342a6db0 100644 --- a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c +++ b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c @@ -1006,18 +1006,18 @@ static int iterate_skl_plus_mmio(struct intel_gvt_mmio_table_iter *iter) MMIO_D(PLANE_NV12_BUF_CFG(PIPE_C, 1)); MMIO_D(PLANE_NV12_BUF_CFG(PIPE_C, 2)); MMIO_D(PLANE_NV12_BUF_CFG(PIPE_C, 3)); - MMIO_D(_MMIO(_REG_701C0(PIPE_A, 1))); - MMIO_D(_MMIO(_REG_701C0(PIPE_A, 2))); - MMIO_D(_MMIO(_REG_701C0(PIPE_A, 3))); - MMIO_D(_MMIO(_REG_701C0(PIPE_A, 4))); - MMIO_D(_MMIO(_REG_701C0(PIPE_B, 1))); - MMIO_D(_MMIO(_REG_701C0(PIPE_B, 2))); - MMIO_D(_MMIO(_REG_701C0(PIPE_B, 3))); - MMIO_D(_MMIO(_REG_701C0(PIPE_B, 4))); - MMIO_D(_MMIO(_REG_701C0(PIPE_C, 1))); - MMIO_D(_MMIO(_REG_701C0(PIPE_C, 2))); - MMIO_D(_MMIO(_REG_701C0(PIPE_C, 3))); - MMIO_D(_MMIO(_REG_701C0(PIPE_C, 4))); + MMIO_D(PLANE_AUX_DIST(PIPE_A, 0)); + MMIO_D(PLANE_AUX_DIST(PIPE_A, 1)); + MMIO_D(PLANE_AUX_DIST(PIPE_A, 2)); + MMIO_D(PLANE_AUX_DIST(PIPE_A, 3)); + MMIO_D(PLANE_AUX_DIST(PIPE_B, 0)); + MMIO_D(PLANE_AUX_DIST(PIPE_B, 1)); + MMIO_D(PLANE_AUX_DIST(PIPE_B, 2)); + MMIO_D(PLANE_AUX_DIST(PIPE_B, 3)); + MMIO_D(PLANE_AUX_DIST(PIPE_C, 0)); + MMIO_D(PLANE_AUX_DIST(PIPE_C, 1)); + MMIO_D(PLANE_AUX_DIST(PIPE_C, 2)); + MMIO_D(PLANE_AUX_DIST(PIPE_C, 3)); MMIO_D(_MMIO(_REG_701C4(PIPE_A, 1))); MMIO_D(_MMIO(_REG_701C4(PIPE_A, 2))); MMIO_D(_MMIO(_REG_701C4(PIPE_A, 3)));