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[0/6] KVM/x86: Add workaround to support ExtINT with AVIC

Message ID 20190322115702.10166-1-suravee.suthikulpanit@amd.com (mailing list archive)
Headers show
Series KVM/x86: Add workaround to support ExtINT with AVIC | expand

Message

Suthikulpanit, Suravee March 22, 2019, 11:57 a.m. UTC
This series is one of the prerequisites for supporting AMD AVIC with
in-kernel irqchip (kernel_irqchip=on).

Since AVIC does not support ExtINT interrupt, which is required during
the booting phase of Windows and FreeBSD VMs (e.g. PIT -> PIC -> ExtInt).
This results in VM hang in the boot loader with kernel_irqchip=on mode.

This series provides workaround by temporary deactivate AVIC and fallback
to use legacy interrupt injection (w/ vINTR and interrupt window).
Then re-activate AVIC once the intrrupts are handled.

Thanks,
Suravee

Suravee Suthikulpanit (6):
  KVM: x86: Add callback functions for handling APIC ID, DFR and LDR
    update
  svm: Add AMD AVIC handlers for APIC ID, DFR and LDR update
  svm: Add support for APIC_ACCESS_PAGE_PRIVATE_MEMSLOT setup/destroy
  kvm: lapic: Add apicv activate/deactivate helper function
  KVM: x86: Add interface for run-time activate/de-activate APIC
    virtualization
  svm: Temporary deactivate AVIC during ExtINT handling

 arch/x86/include/asm/kvm_host.h |  11 ++++
 arch/x86/kvm/lapic.c            |  29 +++++++--
 arch/x86/kvm/lapic.h            |   1 +
 arch/x86/kvm/svm.c              | 106 ++++++++++++++++++++++++++++++--
 arch/x86/kvm/x86.c              |  48 +++++++++++++++
 5 files changed, 185 insertions(+), 10 deletions(-)

Comments

Radim Krčmář April 4, 2019, 9:30 p.m. UTC | #1
2019-03-22 11:57+0000, Suthikulpanit, Suravee:
> This series is one of the prerequisites for supporting AMD AVIC with
> in-kernel irqchip (kernel_irqchip=on).
> 
> Since AVIC does not support ExtINT interrupt, which is required during
> the booting phase of Windows and FreeBSD VMs (e.g. PIT -> PIC -> ExtInt).
> This results in VM hang in the boot loader with kernel_irqchip=on mode.
> 
> This series provides workaround by temporary deactivate AVIC and fallback
> to use legacy interrupt injection (w/ vINTR and interrupt window).
> Then re-activate AVIC once the intrrupts are handled.

The solution looks reasonable (although it seems dangerous to me) as we
only enable the workaround if the interrupt cannot be immediately
injected.

The interesting part is that split irqchip works, yet it cannot inject
ExtInt correctly either -- does the guest OS behave differently, or does
split irqchip just ignore the ExtInt?

Thanks.
Radim Krčmář April 4, 2019, 10:06 p.m. UTC | #2
2019-03-22 11:57+0000, Suthikulpanit, Suravee:
> This series is one of the prerequisites for supporting AMD AVIC with
> in-kernel irqchip (kernel_irqchip=on).
> 
> Since AVIC does not support ExtINT interrupt, which is required during
> the booting phase of Windows and FreeBSD VMs (e.g. PIT -> PIC -> ExtInt).
> This results in VM hang in the boot loader with kernel_irqchip=on mode.
> 
> This series provides workaround by temporary deactivate AVIC and fallback
> to use legacy interrupt injection (w/ vINTR and interrupt window).
> Then re-activate AVIC once the intrrupts are handled.

Hm, another idea.  It is possible to inject the ExtInt in APICv, but if
interrupt injection is currently disabled, we need to wait until the
interrupt window opens, which can't be done with int_* controls n.

Wouldn't intercepting IRET/STGI/IF writes be enough to eventually reach
the point where we can do event_inj?

Thanks.