| Message ID | 20190322115702.10166-2-suravee.suthikulpanit@amd.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | KVM/x86: Add workaround to support ExtINT with AVIC | expand |
On 22/03/19 12:57, Suthikulpanit, Suravee wrote: > Add hooks for handling the case when guest VM update APIC ID, DFR and LDR. > This is needed during AMD AVIC is temporary deactivated. > > Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Why not do this later when AVIC is reactivated, in svm_refresh_apicv_exec_ctrl? Thanks, Paolo > --- > arch/x86/include/asm/kvm_host.h | 3 +++ > arch/x86/kvm/lapic.c | 6 ++++++ > 2 files changed, 9 insertions(+) > > diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h > index a5db4475e72d..1906e205e6a3 100644 > --- a/arch/x86/include/asm/kvm_host.h > +++ b/arch/x86/include/asm/kvm_host.h > @@ -1077,6 +1077,9 @@ struct kvm_x86_ops { > void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu); > void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); > void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr); > + void (*hwapic_apic_id_update)(struct kvm_vcpu *vcpu); > + void (*hwapic_dfr_update)(struct kvm_vcpu *vcpu); > + void (*hwapic_ldr_update)(struct kvm_vcpu *vcpu); > bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu); > void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); > void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu); > diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c > index 991fdf7fc17f..95295cf81283 100644 > --- a/arch/x86/kvm/lapic.c > +++ b/arch/x86/kvm/lapic.c > @@ -262,12 +262,16 @@ static inline void apic_set_spiv(struct kvm_lapic *apic, u32 val) > static inline void kvm_apic_set_xapic_id(struct kvm_lapic *apic, u8 id) > { > kvm_lapic_set_reg(apic, APIC_ID, id << 24); > + if (kvm_x86_ops->hwapic_apic_id_update) > + kvm_x86_ops->hwapic_apic_id_update(apic->vcpu); > recalculate_apic_map(apic->vcpu->kvm); > } > > static inline void kvm_apic_set_ldr(struct kvm_lapic *apic, u32 id) > { > kvm_lapic_set_reg(apic, APIC_LDR, id); > + if (kvm_x86_ops->hwapic_ldr_update) > + kvm_x86_ops->hwapic_ldr_update(apic->vcpu); > recalculate_apic_map(apic->vcpu->kvm); > } > > @@ -1836,6 +1840,8 @@ int kvm_lapic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val) > case APIC_DFR: > if (!apic_x2apic_mode(apic)) { > kvm_lapic_set_reg(apic, APIC_DFR, val | 0x0FFFFFFF); > + if (kvm_x86_ops->hwapic_dfr_update) > + kvm_x86_ops->hwapic_dfr_update(apic->vcpu); > recalculate_apic_map(apic->vcpu->kvm); > } else > ret = 1; >
Paolo, On 7/3/2019 4:16 PM, Paolo Bonzini wrote: > On 22/03/19 12:57, Suthikulpanit, Suravee wrote: >> Add hooks for handling the case when guest VM update APIC ID, DFR and LDR. >> This is needed during AMD AVIC is temporary deactivated. >> >> Signed-off-by: Suravee Suthikulpanit<suravee.suthikulpanit@amd.com> > Why not do this later when AVIC is reactivated, in > svm_refresh_apicv_exec_ctrl? > > Thanks, > > Paolo > Actually, calling avic_post_state_restore() in the svm_refresh_apicv_exec_ctrl() should work also. I'll do that then. Thanks, Suravee
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index a5db4475e72d..1906e205e6a3 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -1077,6 +1077,9 @@ struct kvm_x86_ops { void (*refresh_apicv_exec_ctrl)(struct kvm_vcpu *vcpu); void (*hwapic_irr_update)(struct kvm_vcpu *vcpu, int max_irr); void (*hwapic_isr_update)(struct kvm_vcpu *vcpu, int isr); + void (*hwapic_apic_id_update)(struct kvm_vcpu *vcpu); + void (*hwapic_dfr_update)(struct kvm_vcpu *vcpu); + void (*hwapic_ldr_update)(struct kvm_vcpu *vcpu); bool (*guest_apic_has_interrupt)(struct kvm_vcpu *vcpu); void (*load_eoi_exitmap)(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap); void (*set_virtual_apic_mode)(struct kvm_vcpu *vcpu); diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index 991fdf7fc17f..95295cf81283 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -262,12 +262,16 @@ static inline void apic_set_spiv(struct kvm_lapic *apic, u32 val) static inline void kvm_apic_set_xapic_id(struct kvm_lapic *apic, u8 id) { kvm_lapic_set_reg(apic, APIC_ID, id << 24); + if (kvm_x86_ops->hwapic_apic_id_update) + kvm_x86_ops->hwapic_apic_id_update(apic->vcpu); recalculate_apic_map(apic->vcpu->kvm); } static inline void kvm_apic_set_ldr(struct kvm_lapic *apic, u32 id) { kvm_lapic_set_reg(apic, APIC_LDR, id); + if (kvm_x86_ops->hwapic_ldr_update) + kvm_x86_ops->hwapic_ldr_update(apic->vcpu); recalculate_apic_map(apic->vcpu->kvm); } @@ -1836,6 +1840,8 @@ int kvm_lapic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val) case APIC_DFR: if (!apic_x2apic_mode(apic)) { kvm_lapic_set_reg(apic, APIC_DFR, val | 0x0FFFFFFF); + if (kvm_x86_ops->hwapic_dfr_update) + kvm_x86_ops->hwapic_dfr_update(apic->vcpu); recalculate_apic_map(apic->vcpu->kvm); } else ret = 1;
Add hooks for handling the case when guest VM update APIC ID, DFR and LDR. This is needed during AMD AVIC is temporary deactivated. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> --- arch/x86/include/asm/kvm_host.h | 3 +++ arch/x86/kvm/lapic.c | 6 ++++++ 2 files changed, 9 insertions(+)