diff mbox series

[kvm-unit-tests,3/4] nVMX: Mark bit 39 of MSR_IA32_VMX_EPT_VPID_CAP as reserved

Message ID 20200207174244.6590-4-sean.j.christopherson@intel.com (mailing list archive)
State New, archived
Headers show
Series nVMX: 5-level nested EPT support | expand

Commit Message

Sean Christopherson Feb. 7, 2020, 5:42 p.m. UTC 
Remove bit 39, which is defined as reserved in Intel's SDM, from the set
of allowed-1 bits in MSR_IA32_VMX_EPT_VPID_CAP.

Fixes: 69c8d31 ("VMX: Validate capability MSRs")
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
---
 x86/vmx.c | 1 -
 1 file changed, 1 deletion(-)
diff mbox series

Patch

diff --git a/x86/vmx.c b/x86/vmx.c
index 3a99d27..ac4aa56 100644
--- a/x86/vmx.c
+++ b/x86/vmx.c
@@ -1550,7 +1550,6 @@  static void test_vmx_caps(void)
 		    EPT_CAP_INVEPT_SINGLE |
 		    EPT_CAP_INVEPT_ALL |
 		    VPID_CAP_INVVPID |
-		    (1ull << 39) |
 		    VPID_CAP_INVVPID_ADDR |
 		    VPID_CAP_INVVPID_CXTGLB |
 		    VPID_CAP_INVVPID_ALL |