[41/43] KVM: VMX: Remove redundant write to set vCPU as active at RESET/INIT

Reply-To: Sean Christopherson <seanjc@google.com>
Date: Fri, 23 Apr 2021 17:46:43 -0700
In-Reply-To: <20210424004645.3950558-1-seanjc@google.com>
Message-Id: <20210424004645.3950558-42-seanjc@google.com>
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Subject: [PATCH 41/43] KVM: VMX: Remove redundant write to set vCPU as active
 at RESET/INIT
From: Sean Christopherson <seanjc@google.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: Sean Christopherson <seanjc@google.com>,
        Vitaly Kuznetsov <vkuznets@redhat.com>,
        Wanpeng Li <wanpengli@tencent.com>,
        Jim Mattson <jmattson@google.com>,
        Joerg Roedel <joro@8bytes.org>, kvm@vger.kernel.org,
        linux-kernel@vger.kernel.org
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Message ID	20210424004645.3950558-42-seanjc@google.com (mailing list archive)
State	New, archived
Headers	show Return-Path: <kvm-owner@kernel.org> Reply-To: Sean Christopherson <seanjc@google.com> Date: Fri, 23 Apr 2021 17:46:43 -0700 In-Reply-To: <20210424004645.3950558-1-seanjc@google.com> Message-Id: <20210424004645.3950558-42-seanjc@google.com> Mime-Version: 1.0 References: <20210424004645.3950558-1-seanjc@google.com> Subject: [PATCH 41/43] KVM: VMX: Remove redundant write to set vCPU as active at RESET/INIT From: Sean Christopherson <seanjc@google.com> To: Paolo Bonzini <pbonzini@redhat.com> Cc: Sean Christopherson <seanjc@google.com>, Vitaly Kuznetsov <vkuznets@redhat.com>, Wanpeng Li <wanpengli@tencent.com>, Jim Mattson <jmattson@google.com>, Joerg Roedel <joro@8bytes.org>, kvm@vger.kernel.org, linux-kernel@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Precedence: bulk
Series	KVM: x86: vCPU RESET/INIT fixes and consolidation \| expand [00/43] KVM: x86: vCPU RESET/INIT fixes and consolidation [01/43] KVM: nVMX: Set LDTR to its architecturally defined value on nested VM-Exit [02/43] KVM: VMX: Set EDX at INIT with CPUID.0x1, Family-Model-Stepping [03/43] KVM: SVM: Require exact CPUID.0x1 match when stuffing EDX at INIT [04/43] KVM: SVM: Fall back to KVM's hardcoded value for EDX at RESET/INIT [05/43] KVM: x86: Split out CR0/CR4 MMU role change detectors to separate helpers [06/43] KVM: x86: Properly reset MMU context at vCPU RESET/INIT [07/43] KVM: VMX: Remove explicit MMU reset in enter_rmode() [08/43] KVM: SVM: Drop explicit MMU reset at RESET/INIT [09/43] KVM: SVM: Drop a redundant init_vmcb() from svm_create_vcpu() [10/43] KVM: VMX: Move init_vmcs() invocation to vmx_vcpu_reset() [11/43] KVM: x86: WARN if the APIC map is dirty without an in-kernel local APIC [12/43] KVM: x86: Remove defunct BSP "update" in local APIC reset [13/43] KVM: x86: Migrate the PIT only if vcpu0 is migrated, not any BSP [14/43] KVM: x86: Don't force set BSP bit when local APIC is managed by userspace [15/43] KVM: x86: Set BSP bit in reset BSP vCPU's APIC base by default [16/43] KVM: VMX: Stuff vcpu->arch.apic_base directly at vCPU RESET [17/43] KVM: x86: Open code necessary bits of kvm_lapic_set_base() at vCPU RESET [18/43] KVM: x86: Consolidate APIC base RESET initialization code [19/43] KVM: x86: Move EDX initialization at vCPU RESET to common code [20/43] KVM: SVM: Don't bother writing vmcb->save.rip at vCPU RESET/INIT [21/43] KVM: VMX: Invert handling of CR0.WP for EPT without unrestricted guest [22/43] KVM: VMX: Remove direct write to vcpu->arch.cr0 during vCPU RESET/INIT [23/43] KVM: VMX: Fold ept_update_paging_mode_cr0() back into vmx_set_cr0() [24/43] KVM: nVMX: Do not clear CR3 load/store exiting bits if L1 wants 'em [25/43] KVM: VMX: Pull GUEST_CR3 from the VMCS iff CR3 load exiting is disabled [26/43] KVM: VMX: Process CR0.PG side effects after setting CR0 assets [27/43] KVM: VMX: Skip emulation required checks during pmode/rmode transitions [28/43] KVM: nVMX: Don't evaluate "emulation required" on VM-Exit [29/43] KVM: SVM: Tweak order of cr0/cr4/efer writes at RESET/INIT [30/43] KVM: SVM: Drop redundant writes to vmcb->save.cr4 at RESET/INIT [31/43] KVM: SVM: Stuff save->dr6 at during VMSA sync, not at RESET/INIT [32/43] KVM: VMX: Skip pointless MSR bitmap update when setting EFER [33/43] KVM: VMX: Refresh list of user return MSRs after setting guest CPUID [34/43] KVM: VMX: Don't _explicitly_ reconfigure user return MSRs on vCPU INIT [35/43] KVM: x86: Move setting of sregs during vCPU RESET/INIT to common x86 [36/43] KVM: VMX: Remove obsolete MSR bitmap refresh at vCPU RESET/INIT [37/43] KVM: nVMX: Remove obsolete MSR bitmap refresh at nested transitions [38/43] KVM: VMX: Don't redo x2APIC MSR bitmaps when userspace filter is changed [39/43] KVM: VMX: Remove unnecessary initialization of msr_bitmap_mode [40/43] KVM: VMX: Smush x2APIC MSR bitmap adjustments into single function [41/43] KVM: VMX: Remove redundant write to set vCPU as active at RESET/INIT [42/43] KVM: VMX: Drop VMWRITEs to zero fields at vCPU RESET [43/43] KVM: x86: Drop pointless @reset_roots from kvm_init_mmu()

[41/43] KVM: VMX: Remove redundant write to set vCPU as active at RESET/INIT

Commit Message

Patch