[35/39] crypto: Move SM4_SBOXWORD from target/riscv

Message ID	20230202124230.295997-36-lawrence.hunter@codethink.co.uk (mailing list archive)
State	New, archived
Headers	show Return-Path: <kvm-owner@vger.kernel.org> From: Lawrence Hunter <lawrence.hunter@codethink.co.uk> To: qemu-devel@nongnu.org Cc: dickon.hood@codethink.co.uk, nazar.kazakov@codethink.co.uk, kiran.ostrolenk@codethink.co.uk, frank.chang@sifive.com, palmer@dabbelt.com, alistair.francis@wdc.com, bin.meng@windriver.com, pbonzini@redhat.com, philipp.tomsich@vrull.eu, kvm@vger.kernel.org, Max Chou <max.chou@sifive.com> Subject: [PATCH 35/39] crypto: Move SM4_SBOXWORD from target/riscv Date: Thu, 2 Feb 2023 12:42:26 +0000 Message-Id: <20230202124230.295997-36-lawrence.hunter@codethink.co.uk> In-Reply-To: <20230202124230.295997-1-lawrence.hunter@codethink.co.uk> References: <20230202124230.295997-1-lawrence.hunter@codethink.co.uk> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk
Series	Add RISC-V vector cryptography extensions \| expand [00/39] Add RISC-V vector cryptography extensions [01/39] target/riscv: add zvkb cpu property [02/39] target/riscv: Add vclmul.vv decoding, translation and execution support [03/39] target/riscv: Add vclmul.vx decoding, translation and execution support [04/39] target/riscv: Add vclmulh.vv decoding, translation and execution support [05/39] target/riscv: Add vclmulh.vx decoding, translation and execution support [06/39] target/riscv: Add vrol.[vv,vx] and vror.[vv,vx,vi] decoding, translation and execution supp… [07/39] target/riscv: Add vbrev8.v decoding, translation and execution support [08/39] target/riscv: Add vrev8.v decoding, translation and execution support [09/39] target/riscv: Add vandn.[vv,vx,vi] decoding, translation and execution support [10/39] target/riscv: expose zvkb cpu property [11/39] target/riscv: add zvkns cpu property [12/39] target/riscv: Add vaesef.vv decoding, translation and execution support [13/39] target/riscv: Add vaesef.vs decoding, translation and execution support [14/39] target/riscv: Add vaesdf.vv decoding, translation and execution support [15/39] target/riscv: Add vaesdf.vs decoding, translation and execution support [16/39] target/riscv: Add vaesdm.vv decoding, translation and execution support [17/39] target/riscv: Add vaesdm.vs decoding, translation and execution support [18/39] target/riscv: Add vaesz.vs decoding, translation and execution support [19/39] target/riscv: Add vaesem.vv decoding, translation and execution support [20/39] target/riscv: Add vaesem.vs decoding, translation and execution support [21/39] target/riscv: Add vaeskf1.vi decoding, translation and execution support [22/39] target/riscv: Add vaeskf2.vi decoding, translation and execution support [23/39] target/riscv: expose zvkns cpu property [24/39] target/riscv: add zvknh cpu properties [25/39] target/riscv: Add vsha2ms.vv decoding, translation and execution support [26/39] target/riscv: Add vsha2c[hl].vv decoding, translation and execution support [27/39] target/riscv: expose zvknh cpu properties [28/39] target/riscv: add zvksh cpu property [29/39] target/riscv: Add vsm3me.vv decoding, translation and execution support [30/39] target/riscv: Add vsm3c.vi decoding, translation and execution support [31/39] target/riscv: expose zvksh cpu property [32/39] target/riscv: add zvkg cpu property [33/39] target/riscv: Add vghmac.vv decoding, translation and execution support [34/39] target/riscv: expose zvkg cpu property [35/39] crypto: Move SM4_SBOXWORD from target/riscv [36/39] crypto: Add SM4 constant parameter CK. [37/39] target/riscv: Add zvksed cfg property [38/39] target/riscv: Add Zvksed support [39/39] target/riscv: Expose Zvksed property

Message ID

20230202124230.295997-36-lawrence.hunter@codethink.co.uk (mailing list archive)

State

New, archived

Headers

From: Lawrence Hunter <lawrence.hunter@codethink.co.uk>
To: qemu-devel@nongnu.org
Cc: dickon.hood@codethink.co.uk, nazar.kazakov@codethink.co.uk,
        kiran.ostrolenk@codethink.co.uk, frank.chang@sifive.com,
        palmer@dabbelt.com, alistair.francis@wdc.com,
        bin.meng@windriver.com, pbonzini@redhat.com,
        philipp.tomsich@vrull.eu, kvm@vger.kernel.org,
        Max Chou <max.chou@sifive.com>
Subject: [PATCH 35/39] crypto: Move SM4_SBOXWORD from target/riscv
Date: Thu,  2 Feb 2023 12:42:26 +0000
Message-Id: <20230202124230.295997-36-lawrence.hunter@codethink.co.uk>
In-Reply-To: <20230202124230.295997-1-lawrence.hunter@codethink.co.uk>
References: <20230202124230.295997-1-lawrence.hunter@codethink.co.uk>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Precedence: bulk

Series

Add RISC-V vector cryptography extensions | expand

Commit Message

Lawrence Hunter Feb. 2, 2023, 12:42 p.m. UTC

From: Max Chou <max.chou@sifive.com>

    - Share SM4_SBOXWORD between target/riscv and target/arm.

Signed-off-by: Max Chou <max.chou@sifive.com>
Reviewed-by: Frank Chang <frank.chang@sifive.com>
---
 include/crypto/sm4.h       |  7 +++++++
 target/arm/crypto_helper.c | 10 ++--------
 2 files changed, 9 insertions(+), 8 deletions(-)

Comments

Richard Henderson Feb. 2, 2023, 5:02 p.m. UTC | #1

On 2/2/23 02:42, Lawrence Hunter wrote:
> From: Max Chou <max.chou@sifive.com>
> 
>      - Share SM4_SBOXWORD between target/riscv and target/arm.
> 
> Signed-off-by: Max Chou <max.chou@sifive.com>
> Reviewed-by: Frank Chang <frank.chang@sifive.com>
> ---
>   include/crypto/sm4.h       |  7 +++++++
>   target/arm/crypto_helper.c | 10 ++--------
>   2 files changed, 9 insertions(+), 8 deletions(-)
> 
> diff --git a/include/crypto/sm4.h b/include/crypto/sm4.h
> index 9bd3ebc62e..33478562a4 100644
> --- a/include/crypto/sm4.h
> +++ b/include/crypto/sm4.h
> @@ -1,6 +1,13 @@
>   #ifndef QEMU_SM4_H
>   #define QEMU_SM4_H
>   
> +#define SM4_SBOXWORD(WORD) ( \
> +    sm4_sbox[((WORD) >> 24) & 0xff] << 24 | \
> +    sm4_sbox[((WORD) >> 16) & 0xff] << 16 | \
> +    sm4_sbox[((WORD) >>  8) & 0xff] <<  8 | \
> +    sm4_sbox[((WORD) >>  0) & 0xff] <<  0   \
> +)
> +
>   extern const uint8_t sm4_sbox[256];

I think this would be better as an inline function, so that the types are clear.


r~

diff --git a/include/crypto/sm4.h b/include/crypto/sm4.h
index 9bd3ebc62e..33478562a4 100644
--- a/include/crypto/sm4.h
+++ b/include/crypto/sm4.h
@@ -1,6 +1,13 @@ 
 #ifndef QEMU_SM4_H
 #define QEMU_SM4_H
 
+#define SM4_SBOXWORD(WORD) ( \
+    sm4_sbox[((WORD) >> 24) & 0xff] << 24 | \
+    sm4_sbox[((WORD) >> 16) & 0xff] << 16 | \
+    sm4_sbox[((WORD) >>  8) & 0xff] <<  8 | \
+    sm4_sbox[((WORD) >>  0) & 0xff] <<  0   \
+)
+
 extern const uint8_t sm4_sbox[256];
 
 #endif
diff --git a/target/arm/crypto_helper.c b/target/arm/crypto_helper.c
index d28690321f..4e97af9879 100644
--- a/target/arm/crypto_helper.c
+++ b/target/arm/crypto_helper.c
@@ -707,10 +707,7 @@  static void do_crypto_sm4e(uint64_t *rd, uint64_t *rn, uint64_t *rm)
             CR_ST_WORD(d, (i + 3) % 4) ^
             CR_ST_WORD(n, i);
 
-        t = sm4_sbox[t & 0xff] |
-            sm4_sbox[(t >> 8) & 0xff] << 8 |
-            sm4_sbox[(t >> 16) & 0xff] << 16 |
-            sm4_sbox[(t >> 24) & 0xff] << 24;
+        t = SM4_SBOXWORD(t);
 
         CR_ST_WORD(d, i) ^= t ^ rol32(t, 2) ^ rol32(t, 10) ^ rol32(t, 18) ^
                             rol32(t, 24);
@@ -744,10 +741,7 @@  static void do_crypto_sm4ekey(uint64_t *rd, uint64_t *rn, uint64_t *rm)
             CR_ST_WORD(d, (i + 3) % 4) ^
             CR_ST_WORD(m, i);
 
-        t = sm4_sbox[t & 0xff] |
-            sm4_sbox[(t >> 8) & 0xff] << 8 |
-            sm4_sbox[(t >> 16) & 0xff] << 16 |
-            sm4_sbox[(t >> 24) & 0xff] << 24;
+        t = SM4_SBOXWORD(t);
 
         CR_ST_WORD(d, i) ^= t ^ rol32(t, 13) ^ rol32(t, 23);
     }

[35/39] crypto: Move SM4_SBOXWORD from target/riscv

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