| Message ID | 20240504122841.1177683-18-npiggin@gmail.com (mailing list archive) |
|---|---|
| State | New |
| Headers | show |
| Series | powerpc improvements | expand |
On 04/05/2024 14.28, Nicholas Piggin wrote: > Add a cpu_relax variant that uses SMT priority nop instructions like > Linux. This was split out of the SMP patch because it affects the sprs > test case. > > Signed-off-by: Nicholas Piggin <npiggin@gmail.com> > --- > lib/ppc64/asm/barrier.h | 1 + > powerpc/sprs.c | 4 ++-- > 2 files changed, 3 insertions(+), 2 deletions(-) Reviewed-by: Thomas Huth <thuth@redhat.com>
diff --git a/lib/ppc64/asm/barrier.h b/lib/ppc64/asm/barrier.h index d2df29520..475434b6a 100644 --- a/lib/ppc64/asm/barrier.h +++ b/lib/ppc64/asm/barrier.h @@ -1,6 +1,7 @@ #ifndef _ASMPPC64_BARRIER_H_ #define _ASMPPC64_BARRIER_H_ +#define cpu_relax() asm volatile("or 1,1,1 ; or 2,2,2" ::: "memory") #define pause_short() asm volatile(".long 0x7c40003c" ::: "memory") #define mb() asm volatile("sync":::"memory") diff --git a/powerpc/sprs.c b/powerpc/sprs.c index de9e87a21..c5844985a 100644 --- a/powerpc/sprs.c +++ b/powerpc/sprs.c @@ -228,8 +228,8 @@ static const struct spr sprs_power_common[1024] = { [815] = { "TAR", 64, RW, }, [848] = { "IC", 64, HV_RW | OS_RO, SPR_ASYNC, }, [849] = { "VTB", 64, HV_RW | OS_RO, SPR_ASYNC, }, -[896] = { "PPR", 64, RW, }, -[898] = { "PPR32", 32, RW, }, +[896] = { "PPR", 64, RW, SPR_ASYNC, }, /* PPR(32) is changed by cpu_relax(), appears to be async */ +[898] = { "PPR32", 32, RW, SPR_ASYNC, }, [1023]= { "PIR", 32, OS_RO, SPR_ASYNC, }, /* Can't be virtualised, appears to be async */ };
Add a cpu_relax variant that uses SMT priority nop instructions like Linux. This was split out of the SMP patch because it affects the sprs test case. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> --- lib/ppc64/asm/barrier.h | 1 + powerpc/sprs.c | 4 ++-- 2 files changed, 3 insertions(+), 2 deletions(-)