@@ -10,6 +10,9 @@ void handle_exception(int trap, void (*func)(struct pt_regs *, void *), void *);
void do_handle_exception(struct pt_regs *regs);
#endif /* __ASSEMBLY__ */
+extern bool host_is_tcg;
+extern bool host_is_kvm;
+
extern bool cpu_has_hv;
extern bool cpu_has_power_mce;
extern bool cpu_has_siar;
@@ -235,6 +235,8 @@ void cpu_init(struct cpu *cpu, int cpu_id)
cpu->in_user = false;
}
+bool host_is_tcg;
+bool host_is_kvm;
bool is_hvmode;
void setup(const void *fdt)
@@ -290,6 +292,29 @@ void setup(const void *fdt)
assert(ret == 0);
freemem += fdt_size;
+ if (!fdt_node_check_compatible(fdt, 0, "qemu,pseries")) {
+ assert(!cpu_has_hv);
+
+ /*
+ * host_is_tcg incorrectly does not get set when running
+ * KVM on a TCG host (using powernv HV emulation or spapr
+ * nested HV).
+ */
+ ret = fdt_subnode_offset(fdt, 0, "hypervisor");
+ if (ret < 0) {
+ host_is_tcg = true;
+ host_is_kvm = false;
+ } else {
+ /* KVM is the only supported hypervisor */
+ assert(!fdt_node_check_compatible(fdt, ret, "linux,kvm"));
+ host_is_tcg = false;
+ host_is_kvm = true;
+ }
+ } else {
+ assert(cpu_has_hv);
+ host_is_tcg = true;
+ host_is_kvm = false;
+ }
ret = dt_get_initrd(&tmp, &initrd_size);
assert(ret == 0 || ret == -FDT_ERR_NOTFOUND);
if (ret == 0) {
@@ -119,7 +119,7 @@ static void test_lwarx_stwcx(int argc, char *argv[])
"stwcx. %1,0,%3;"
: "=&r"(old) : "r"(1), "r"(var), "r"((char *)var+1) : "cr0", "memory");
/* unaligned larx/stcx. is not required by the ISA to cause an exception, in TCG the stcx does not. */
- report_kfail(true, old == 0 && *var == 0 && got_interrupt && recorded_regs.trap == 0x600, "unaligned stwcx. causes fault");
+ report_kfail(host_is_tcg, old == 0 && *var == 0 && got_interrupt && recorded_regs.trap == 0x600, "unaligned stwcx. causes fault");
got_interrupt = false;
handle_exception(0x600, NULL, NULL);
@@ -78,7 +78,8 @@ static void test_mce(void)
is_fetch = false;
asm volatile("lbz %0,0(%1)" : "=r"(tmp) : "r"(addr));
- report(got_interrupt, "MCE on access to invalid real address");
+ /* KVM does not MCE on access outside partition scope */
+ report_kfail(host_is_kvm, got_interrupt, "MCE on access to invalid real address");
if (got_interrupt) {
report(mfspr(SPR_DAR) == addr, "MCE sets DAR correctly");
if (cpu_has_power_mce)
@@ -88,7 +89,8 @@ static void test_mce(void)
is_fetch = true;
asm volatile("mtctr %0 ; bctrl" :: "r"(addr) : "ctr", "lr");
- report(got_interrupt, "MCE on fetch from invalid real address");
+ /* KVM does not MCE on access outside partition scope */
+ report_kfail(host_is_kvm, got_interrupt, "MCE on fetch from invalid real address");
if (got_interrupt) {
report(recorded_regs.nip == addr, "MCE sets SRR0 correctly");
if (cpu_has_power_mce)
@@ -172,7 +172,7 @@ static void test_tlbie(int argc, char **argv)
handle_exception(0x700, NULL, NULL);
/* TCG has a known race invalidating other CPUs */
- report_kfail(true, !tlbie_test_failed, "tlbie");
+ report_kfail(host_is_tcg, !tlbie_test_failed, "tlbie");
}
#define THIS_ITERS 100000
@@ -107,7 +107,7 @@ static void test_pmc5_with_sc(void)
pmc5_2 = mfspr(SPR_PMC5);
/* TCG does not count instructions around syscalls correctly */
- report_kfail(true, pmc5_1 + 20 == pmc5_2, "PMC5 counts instructions with syscall");
+ report_kfail(host_is_tcg, pmc5_1 + 20 == pmc5_2, "PMC5 counts instructions with syscall");
handle_exception(0xc00, NULL, NULL);
}
@@ -336,7 +336,7 @@ static void test_bhrb(void)
break;
}
report(nr_bhrbe, "BHRB has been written");
- report_kfail(true, nr_bhrbe == 8, "BHRB has written 8 entries");
+ report_kfail(!host_is_tcg, nr_bhrbe == 8, "BHRB has written 8 entries");
if (nr_bhrbe == 8) {
report(bhrbe[4] == (unsigned long)dummy_branch_1,
"correct unconditional branch address");
@@ -369,7 +369,7 @@ static void test_bhrb(void)
break;
}
report(nr_bhrbe, "BHRB has been written");
- report_kfail(true, nr_bhrbe == 6, "BHRB has written 6 entries");
+ report_kfail(!host_is_tcg, nr_bhrbe == 6, "BHRB has written 6 entries");
if (nr_bhrbe == 6) {
report(bhrbe[4] == (unsigned long)dummy_branch_1,
"correct unconditional branch address");
@@ -590,7 +590,7 @@ int main(int argc, char **argv)
if (sprs[i].width == 32 && !(before[i] >> 32) && !(after[i] >> 32)) {
/* known failure KVM migration of CTRL */
- report_kfail(true && i == 136,
+ report_kfail(host_is_kvm && i == 136,
"%-10s(%4d):\t 0x%08lx <==> 0x%08lx",
sprs[i].name, i,
before[i], after[i]);
@@ -94,7 +94,7 @@ static void test_dec(int argc, char **argv)
break;
}
/* POWER CPUs can have a slight (few ticks) variation here */
- report_kfail(true, tb2 - tb1 >= dec_max - dec, "decrementer remains within TB after mtDEC");
+ report_kfail(!host_is_tcg, tb2 - tb1 >= dec_max - dec, "decrementer remains within TB after mtDEC");
tb1 = get_tb();
mtspr(SPR_DEC, dec_max);
@@ -159,7 +159,7 @@ static void test_dec(int argc, char **argv)
local_irq_enable();
local_irq_disable();
/* TCG does not model this correctly */
- report_kfail(true, !got_interrupt, "no interrupt after wrap to positive");
+ report_kfail(host_is_tcg, !got_interrupt, "no interrupt after wrap to positive");
got_interrupt = false;
handle_exception(0x900, NULL, NULL);
@@ -135,7 +135,7 @@ int main(int argc, char **argv)
}
/* kvm-unit-tests can limit number of CPUs present */
/* KVM does not report TM in secondary threads in POWER9 */
- report_kfail(true, cpus_with_tm >= nr_cpus_present,
+ report_kfail(host_is_kvm, cpus_with_tm >= nr_cpus_present,
"TM available in all 'ibm,pa-features' properties");
all = argc == 1 || !strcmp(argv[1], "all");
Use device tree properties to determine whether KVM or TCG is in use. Logically these are not the inverse of one another, because KVM can be used on top of a TCG processor (if TCG is emulating HV mode, or if it provides a nested hypervisor interface with spapr). This can be a problem because some issues relate to TCG CPU emulation, and some to the spapr hypervisor implementation. At the moment there is no way to determine TCG is running a KVM host that is running the tests, but the two independent variables are added in case that is able to be determined in future. For now that case is just incorrectly considered to be kvm && !tcg. Use this facility to restrict some of the known test failures to TCG. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> --- lib/powerpc/asm/processor.h | 3 +++ lib/powerpc/setup.c | 25 +++++++++++++++++++++++++ powerpc/atomics.c | 2 +- powerpc/interrupts.c | 6 ++++-- powerpc/mmu.c | 2 +- powerpc/pmu.c | 6 +++--- powerpc/sprs.c | 2 +- powerpc/timebase.c | 4 ++-- powerpc/tm.c | 2 +- 9 files changed, 41 insertions(+), 11 deletions(-)