| Message ID | 20210107183907.6545-1-s-anna@ti.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | Add R5F nodes on TI K3 J7200 SoCs | expand |
On 12:39-20210107, Suman Anna wrote: > Hi Nishanth, > > The TI K3 R5F remoteproc driver support for the R5F instances on J7200 > SoCs is merged in 5.11-rc1, and this series adds the follow-on base > dt nodes for the R5F remote processors on TI K3 J7200 SoCs. The R5F > nodes on J7200 slightly differ from those on J721E SoCs highlighted > in the driver changes [1]. Additional memory nodes were also added to > boot these processors successfully on applicable TI K3 J7200 EVM boards. > The series uses previously merged mailbox nodes. > > The patches follow the same style to similar patches added for J721E > SoCs [2]. Patches are on top of the latest v5.11-rc2 tag. > > I have validated the IPC functionality using System Firmware > v2020.07-rc3 and corresponding IPC example firmwares. > > regards > Suman > > [1] https://patchwork.kernel.org/project/linux-arm-kernel/cover/20201119010531.21083-1-s-anna@ti.com/ > [2] https://patchwork.kernel.org/project/linux-arm-kernel/list/?series=372749&state=%2A&archive=both > > Suman Anna (5): > arm64: dts: ti: k3-j7200-mcu: Add MCU domain R5F cluster node > arm64: dts: ti: k3-j7200-main: Add MAIN domain R5F cluster node ^^ Please squash these two. > arm64: dts: ti: k3-j7200-som-p0: Add mailboxes to R5Fs > arm64: dts: ti: k3-j7200-som-p0: Add DDR carveout memory nodes for > R5Fs > arm64: dts: ti: k3-j7200-som-p0: Reserve memory for IPC between RTOS > cores The DDR carveouts and reservations could be a single patch. These seem trivial enough
Hi Nishanth, The TI K3 R5F remoteproc driver support for the R5F instances on J7200 SoCs is merged in 5.11-rc1, and this series adds the follow-on base dt nodes for the R5F remote processors on TI K3 J7200 SoCs. The R5F nodes on J7200 slightly differ from those on J721E SoCs highlighted in the driver changes [1]. Additional memory nodes were also added to boot these processors successfully on applicable TI K3 J7200 EVM boards. The series uses previously merged mailbox nodes. The patches follow the same style to similar patches added for J721E SoCs [2]. Patches are on top of the latest v5.11-rc2 tag. I have validated the IPC functionality using System Firmware v2020.07-rc3 and corresponding IPC example firmwares. regards Suman [1] https://patchwork.kernel.org/project/linux-arm-kernel/cover/20201119010531.21083-1-s-anna@ti.com/ [2] https://patchwork.kernel.org/project/linux-arm-kernel/list/?series=372749&state=%2A&archive=both Suman Anna (5): arm64: dts: ti: k3-j7200-mcu: Add MCU domain R5F cluster node arm64: dts: ti: k3-j7200-main: Add MAIN domain R5F cluster node arm64: dts: ti: k3-j7200-som-p0: Add mailboxes to R5Fs arm64: dts: ti: k3-j7200-som-p0: Add DDR carveout memory nodes for R5Fs arm64: dts: ti: k3-j7200-som-p0: Reserve memory for IPC between RTOS cores arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 42 +++++++++- .../boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 42 +++++++++- arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi | 80 ++++++++++++++++++- 3 files changed, 161 insertions(+), 3 deletions(-)